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author | Tom Rini <trini@ti.com> | 2012-12-22 05:55:19 -0700 |
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committer | Tom Rini <trini@ti.com> | 2012-12-22 05:55:19 -0700 |
commit | da77a0e593c370c9ed79ea22c1df321d5f4e4bbf (patch) | |
tree | d31ff68d217a80422845c82104098eef744f4cde /include/configs/trats.h | |
parent | ba6d4b64b33146740a15b3dd5a5f511a2bc8d6f6 (diff) | |
parent | 96764df1b47ddebfb50fadf5af72530b07b5fc89 (diff) | |
download | u-boot-imx-da77a0e593c370c9ed79ea22c1df321d5f4e4bbf.zip u-boot-imx-da77a0e593c370c9ed79ea22c1df321d5f4e4bbf.tar.gz u-boot-imx-da77a0e593c370c9ed79ea22c1df321d5f4e4bbf.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot-arm
Diffstat (limited to 'include/configs/trats.h')
-rw-r--r-- | include/configs/trats.h | 17 |
1 files changed, 11 insertions, 6 deletions
diff --git a/include/configs/trats.h b/include/configs/trats.h index 94ba55e..6efee5c 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -211,12 +211,17 @@ #define CONFIG_SYS_HZ 1000 -/* TRATS has 2 banks of DRAM */ -#define CONFIG_NR_DRAM_BANKS 2 -#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* LDDDR2 DMC 0 */ -#define PHYS_SDRAM_1_SIZE (512 << 20) /* 512 MB in CS 0 */ -#define PHYS_SDRAM_2 0x50000000 /* LPDDR2 DMC 1 */ -#define PHYS_SDRAM_2_SIZE (512 << 20) /* 512 MB in CS 0 */ +/* TRATS has 4 banks of DRAM */ +#define CONFIG_NR_DRAM_BANKS 4 +#define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */ +#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE +#define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE +#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE) +#define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE +#define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE +#define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */ |