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| author | Paul Burton <paul.burton@imgtec.com> | 2016-05-27 14:28:04 +0100 |
|---|---|---|
| committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2016-05-31 09:44:24 +0200 |
| commit | ace3be4f15875d74344336b9754c14274f940969 (patch) | |
| tree | 462b0bcc538f617028dbf06221cdeb26d2ce0c01 /include/configs/tplink_wdr4300.h | |
| parent | 83b0face8c710f719445f3c282c2ca6fad326bd7 (diff) | |
| download | u-boot-imx-ace3be4f15875d74344336b9754c14274f940969.zip u-boot-imx-ace3be4f15875d74344336b9754c14274f940969.tar.gz u-boot-imx-ace3be4f15875d74344336b9754c14274f940969.tar.bz2 | |
MIPS: Move cache sizes to Kconfig
Move details of the L1 cache line sizes & total sizes into Kconfig,
defaulting to 0. A new CONFIG_SYS_CACHE_SIZE_AUTO Kconfig entry is
introduced to allow platforms to select auto-detection of cache sizes,
and it defaults to being enabled if none of the cache sizes are set by
the configuration (ie. sizes are all the default 0), and code is
adjusted to #ifdef on that rather than on the definition of the sizes
(which will always be defined even if 0).
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Diffstat (limited to 'include/configs/tplink_wdr4300.h')
| -rw-r--r-- | include/configs/tplink_wdr4300.h | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/include/configs/tplink_wdr4300.h b/include/configs/tplink_wdr4300.h index 09a69fe..6273711 100644 --- a/include/configs/tplink_wdr4300.h +++ b/include/configs/tplink_wdr4300.h @@ -15,11 +15,6 @@ #define CONFIG_SYS_MHZ 280 #define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000) -/* Cache Configuration */ -#define CONFIG_SYS_DCACHE_SIZE 0x8000 -#define CONFIG_SYS_ICACHE_SIZE 0x10000 -#define CONFIG_SYS_CACHELINE_SIZE 32 - #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MALLOC_LEN 0x40000 |