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authorTom Rini <trini@ti.com>2011-11-18 12:48:04 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-12-06 23:59:38 +0100
commit1be1433b834aaf7aef7c92275f92d4729f6bd62e (patch)
tree6f21533bfe62196777c60c117daf2dd4ed75f342 /include/configs/taihu.h
parent14ca3dee80718b5f8fd06e39e78a4e7757826bbf (diff)
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OMAP3: Add optimal SDRC autorefresh control values
This adds the optimal SDRC autorefresh control register values for 100Mhz, 133MHz, 165MHz and 200MHz clocks. We switch to using this to provide the default 165MHz value. Signed-off-by: Tom Rini <trini@ti.com>
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