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| author | Prabhakar Kushwaha <prabhakar@freescale.com> | 2012-12-18 17:23:19 +0000 |
|---|---|---|
| committer | Andy Fleming <afleming@freescale.com> | 2013-01-30 11:25:09 -0600 |
| commit | 9427ba5c279700640419605afb61a13838ba5268 (patch) | |
| tree | 643641c20a1dbda2393f9355aaedcfcb7b3d2ce0 /include/configs/t4qds.h | |
| parent | ac13eb5de0e465b1bfddab2cdb3a902f583043e8 (diff) | |
| download | u-boot-imx-9427ba5c279700640419605afb61a13838ba5268.zip u-boot-imx-9427ba5c279700640419605afb61a13838ba5268.tar.gz u-boot-imx-9427ba5c279700640419605afb61a13838ba5268.tar.bz2 | |
boards/T4240qds:Fix IFC AMASK init as per FPGA register space
T4240QDS's QIXIS FPGA has 4k register space size and IFC controller's
Address Mask Registers is initialised 64K size.
So Fix the Address Mask Register initilisation as 4K
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'include/configs/t4qds.h')
| -rw-r--r-- | include/configs/t4qds.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h index d58c24c..d93e026 100644 --- a/include/configs/t4qds.h +++ b/include/configs/t4qds.h @@ -259,7 +259,7 @@ unsigned long get_board_ddr_clk(void); | CSPR_PORT_SIZE_8 \ | CSPR_MSEL_GPCM \ | CSPR_V) -#define CONFIG_SYS_AMASK3 IFC_AMASK(64*1024) +#define CONFIG_SYS_AMASK3 IFC_AMASK(4 * 1024) #define CONFIG_SYS_CSOR3 0x0 /* QIXIS Timing parameters for IFC CS3 */ #define CONFIG_SYS_CS3_FTIM0 (FTIM0_GPCM_TACSE(0x0e) | \ |