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| author | Jon Loeliger <jdl@freescale.com> | 2008-06-06 10:48:31 -0500 |
|---|---|---|
| committer | Jon Loeliger <jdl@freescale.com> | 2008-06-06 10:48:31 -0500 |
| commit | 1a247ba7fa5fb09f56892a09a990f03ce564b3e2 (patch) | |
| tree | 9dab0ef013cc6dc7883454808ecf6ba4d7a7a94e /include/configs/stxxtc.h | |
| parent | 2c289e320dcfb3760e99cf1d765cb067194a1202 (diff) | |
| parent | 8155efbd7ae9c65564ca98affe94631d612ae088 (diff) | |
| download | u-boot-imx-1a247ba7fa5fb09f56892a09a990f03ce564b3e2.zip u-boot-imx-1a247ba7fa5fb09f56892a09a990f03ce564b3e2.tar.gz u-boot-imx-1a247ba7fa5fb09f56892a09a990f03ce564b3e2.tar.bz2 | |
Merge commit 'wd/master'
Diffstat (limited to 'include/configs/stxxtc.h')
| -rw-r--r-- | include/configs/stxxtc.h | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/include/configs/stxxtc.h b/include/configs/stxxtc.h index a3ab798..97a1032 100644 --- a/include/configs/stxxtc.h +++ b/include/configs/stxxtc.h @@ -63,9 +63,9 @@ #undef CONFIG_BOOTARGS #define CONFIG_BOOTCOMMAND \ - "tftpboot; " \ - "setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} " \ - "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off; " \ + "tftpboot; " \ + "setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} " \ + "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off; " \ "bootm" #define CONFIG_AUTOSCRIPT @@ -93,7 +93,7 @@ #define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */ -#define CONFIG_NET_MULTI 1 /* the only way to get the FEC in */ +#define CONFIG_NET_MULTI 1 /* the only way to get the FEC in */ #define FEC_ENET 1 /* eth.c needs it that way... */ #undef CFG_DISCOVER_PHY #define CONFIG_MII 1 @@ -101,7 +101,7 @@ #undef CONFIG_RMII #define CONFIG_ETHER_ON_FEC1 1 -#define CONFIG_FEC1_PHY 1 /* phy address of FEC */ +#define CONFIG_FEC1_PHY 1 /* phy address of FEC */ #undef CONFIG_FEC1_PHY_NORXERR #define CONFIG_ETHER_ON_FEC2 1 @@ -214,7 +214,7 @@ #define CFG_FLASH_CFI 1 #define CFG_FLASH_CFI_DRIVER 1 -#undef CFG_FLASH_USE_BUFFER_WRITE /* use buffered writes (20x faster) */ +#undef CFG_FLASH_USE_BUFFER_WRITE /* use buffered writes (20x faster) */ #define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */ #define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */ @@ -283,11 +283,11 @@ #if MPC8XX_HZ == 50000000 #define CFG_PLPRCR ((0 << PLPRCR_MFN_SHIFT) | (0 << PLPRCR_MFD_SHIFT) | \ (1 << PLPRCR_S_SHIFT) | (10 << PLPRCR_MFI_SHIFT) | (0 << PLPRCR_PDF_SHIFT) | \ - PLPRCR_TEXPS) + PLPRCR_TEXPS) #elif MPC8XX_HZ == 66666666 #define CFG_PLPRCR ((1 << PLPRCR_MFN_SHIFT) | (2 << PLPRCR_MFD_SHIFT) | \ (1 << PLPRCR_S_SHIFT) | (13 << PLPRCR_MFI_SHIFT) | (0 << PLPRCR_PDF_SHIFT) | \ - PLPRCR_TEXPS) + PLPRCR_TEXPS) #else #error unsupported CPU freq for XIN = 10MHz #endif @@ -462,7 +462,7 @@ #define ADDR_COLUMN 1 #define ADDR_PAGE 2 #define ADDR_COLUMN_PAGE 3 -#define NAND_ChipID_UNKNOWN 0x00 +#define NAND_ChipID_UNKNOWN 0x00 #define NAND_MAX_FLOORS 1 #define NAND_MAX_CHIPS 1 |