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| author | Scott Wood <scottwood@freescale.com> | 2012-10-02 19:35:18 -0500 |
|---|---|---|
| committer | Scott Wood <scottwood@freescale.com> | 2012-11-26 15:41:26 -0600 |
| commit | d674bccf738396ecdc4374f5b5cb3e7fd376a0ab (patch) | |
| tree | 889863e035aad4c90bf41b79c537be30e86dcefb /include/configs/socfpga_cyclone5.h | |
| parent | a796e72c78beb0bc29bbf068962b546639a099cd (diff) | |
| download | u-boot-imx-d674bccf738396ecdc4374f5b5cb3e7fd376a0ab.zip u-boot-imx-d674bccf738396ecdc4374f5b5cb3e7fd376a0ab.tar.gz u-boot-imx-d674bccf738396ecdc4374f5b5cb3e7fd376a0ab.tar.bz2 | |
powerpc/mpc85xx/p1_p2_rdb_pc: clean up memory map
- Sort by address, and fix column alignment
- Don't label things as localbus that aren't. Instead, put chipselect
info at the end of the description for localbus windows. Note that
NAND/NOR have their chipselects swapped when booting from NAND, and CS2
can be either PMC or VSC7385 depending on hwconfig.
- Shrink NAND to the 32K that's actually mapped in the localbus
- Assign an address and size to L2 SRAM. Remove the similarly named
but unintelligible "L2 SDRAM(REV.)".
- Remove the untrue comment about L1 stack being mapped with TLB0.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'include/configs/socfpga_cyclone5.h')
0 files changed, 0 insertions, 0 deletions