summaryrefslogtreecommitdiff
path: root/include/configs/socfpga_arria5_socdk.h
diff options
context:
space:
mode:
authorPhilipp Rosenberger <ilu@linutronix.de>2015-11-12 18:23:10 +0100
committerMarek Vasut <marex@denx.de>2015-11-30 13:30:19 +0100
commit8a30e3a73a0a7db44cf81f486feba684cbcb4be5 (patch)
tree1a022cb082c2a112eee57d2a3fde6c6d2f1847da /include/configs/socfpga_arria5_socdk.h
parentfa8883a1e39a20e72aaa5093af0c80062cb95757 (diff)
downloadu-boot-imx-8a30e3a73a0a7db44cf81f486feba684cbcb4be5.zip
u-boot-imx-8a30e3a73a0a7db44cf81f486feba684cbcb4be5.tar.gz
u-boot-imx-8a30e3a73a0a7db44cf81f486feba684cbcb4be5.tar.bz2
arm: socfpga: reset: FIX address of tstscratch register
The Cyclone V Hard Processor System Technical Reference Manual in the chapter about the Reset Manager Module Address Map stats that the offset of the tstscratch register ist 0x54 not 0x24. Cyclone V Hard Processor System Technical Reference Manual cv_5v4 2015.11.02 page 3-17 Reset Manager Module Address Map Signed-off-by: Philipp Rosenberger <ilu@linutronix.de>
Diffstat (limited to 'include/configs/socfpga_arria5_socdk.h')
0 files changed, 0 insertions, 0 deletions