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authorStefan Roese <sr@denx.de>2007-01-05 10:38:05 +0100
committerStefan Roese <sr@denx.de>2007-01-05 10:38:05 +0100
commit023889838282b6237b401664f22dd22dfba2c066 (patch)
treea57a564f35070ba04ed56dea78367a2f5d7c13d9 /include/configs/sequoia.h
parent92eb729bad876725aeea908d2addba0800620840 (diff)
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[PATCH] Add DDR2 optimization code for Sequoia (440EPx) board
This code will optimize the DDR2 controller setup on a board specific basis. Note: This code doesn't work right now on the NAND booting image for the Sequoia board, since it doesn't fit into the 4kBytes for the SPL image. Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'include/configs/sequoia.h')
-rw-r--r--include/configs/sequoia.h5
1 files changed, 4 insertions, 1 deletions
diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h
index 00b9222..e7f0108 100644
--- a/include/configs/sequoia.h
+++ b/include/configs/sequoia.h
@@ -188,7 +188,10 @@
/*-----------------------------------------------------------------------
* DDR SDRAM
*----------------------------------------------------------------------*/
-#define CFG_MBYTES_SDRAM (256) /* 256MB */
+#define CFG_MBYTES_SDRAM (256) /* 256MB */
+#if !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)
+#define CONFIG_DDR_DATA_EYE /* use DDR2 optimization */
+#endif
/*-----------------------------------------------------------------------
* I2C