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| author | Stefan Roese <sr@denx.de> | 2007-06-22 10:28:26 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2007-06-22 10:28:26 +0200 |
| commit | e08e6453fced498b28950f36088c87c0b639a682 (patch) | |
| tree | 5730c11e7440a6b88094d050172b8e5b4b707fbd /include/configs/sequoia.h | |
| parent | d7d5204ce2e0985ff2dfdf3a6b5b6a526cdb1c1e (diff) | |
| parent | 83b4cfa3d629dff0264366263c5e94d9a50ad80b (diff) | |
| download | u-boot-imx-e08e6453fced498b28950f36088c87c0b639a682.zip u-boot-imx-e08e6453fced498b28950f36088c87c0b639a682.tar.gz u-boot-imx-e08e6453fced498b28950f36088c87c0b639a682.tar.bz2 | |
Merge with git://www.denx.de/git/u-boot.git
Diffstat (limited to 'include/configs/sequoia.h')
| -rw-r--r-- | include/configs/sequoia.h | 14 |
1 files changed, 11 insertions, 3 deletions
diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h index e1572ba..42b42fc 100644 --- a/include/configs/sequoia.h +++ b/include/configs/sequoia.h @@ -37,6 +37,7 @@ #else #define CONFIG_440GRX 1 /* Specific PPC440GRx */ #endif +#define CONFIG_440 1 /* ... PPC440 family */ #define CONFIG_4xx 1 /* ... PPC4xx family */ /* Detect Sequoia PLL input clock automatically via CPLD bit */ #define CONFIG_SYS_CLK_FREQ ((in8(CFG_BCSR_BASE + 3) & 0x80) ? \ @@ -168,12 +169,19 @@ /* * Now the NAND chip has to be defined (no autodetection used!) */ -#define CFG_NAND_PAGE_SIZE (512) /* NAND chip page size */ +#define CFG_NAND_PAGE_SIZE 512 /* NAND chip page size */ #define CFG_NAND_BLOCK_SIZE (16 << 10) /* NAND chip block size */ -#define CFG_NAND_PAGE_COUNT (32) /* NAND chip page count */ -#define CFG_NAND_BAD_BLOCK_POS (5) /* Location of bad block marker */ +#define CFG_NAND_PAGE_COUNT 32 /* NAND chip page count */ +#define CFG_NAND_BAD_BLOCK_POS 5 /* Location of bad block marker */ #undef CFG_NAND_4_ADDR_CYCLE /* No fourth addr used (<=32MB) */ +#define CFG_NAND_ECCSIZE 256 +#define CFG_NAND_ECCBYTES 3 +#define CFG_NAND_ECCSTEPS (CFG_NAND_PAGE_SIZE / CFG_NAND_ECCSIZE) +#define CFG_NAND_OOBSIZE 16 +#define CFG_NAND_ECCTOTAL (CFG_NAND_ECCBYTES * CFG_NAND_ECCSTEPS) +#define CFG_NAND_ECCPOS {0, 1, 2, 3, 6, 7} + #ifdef CFG_ENV_IS_IN_NAND /* * For NAND booting the environment is embedded in the U-Boot image. Please take |