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author | Stefan Roese <sr@denx.de> | 2007-10-31 17:57:52 +0100 |
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committer | Stefan Roese <sr@denx.de> | 2007-10-31 21:21:47 +0100 |
commit | d25dfe08fbd1220cb994e7e6b105049aa9aa8e79 (patch) | |
tree | b3fe3e942a36d0e6f668194e6cf911a4b436fca8 /include/configs/sc3.h | |
parent | 9b94ac61d2176185c30adf0793e079ec30e68687 (diff) | |
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ppc4xx: Remove cache definition from 4xx board config files
All 4xx board config files don't need the cache definitions anymore.
These are now defined in common headers.
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'include/configs/sc3.h')
-rw-r--r-- | include/configs/sc3.h | 18 |
1 files changed, 0 insertions, 18 deletions
diff --git a/include/configs/sc3.h b/include/configs/sc3.h index cb22536..0a03c0e 100644 --- a/include/configs/sc3.h +++ b/include/configs/sc3.h @@ -433,24 +433,6 @@ extern unsigned long offsetOfEnvironment; #define CONFIG_JFFS2_PART_SIZE 0x01000000 #define CONFIG_JFFS2_PART_OFFSET 0x00000000 -/*----------------------------------------------------------------------- - * Cache Configuration - * - * CFG_DCACHE_SIZE -> size of data cache: - * - 405GP 8k - * - 405GPr 16k - * How to handle the difference in chache size? - * CFG_CACHELINE_SIZE -> size of one cache line: 32 bytes - * (used in cpu/ppc4xx/start.S) -*/ -#define CFG_DCACHE_SIZE 16384 - -#define CFG_CACHELINE_SIZE 32 - -#if defined(CONFIG_CMD_KGDB) - #define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */ -#endif - /* * Init Memory Controller: * |