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| author | Tom Rini <trini@konsulko.com> | 2016-08-20 11:35:28 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2016-08-20 16:40:34 -0400 |
| commit | c98b171e1098f94b2ff7720c45a25a602882f876 (patch) | |
| tree | e89e772841c83c5600a5288216b78b05840d903d /include/configs/salvator-x.h | |
| parent | f835706c2957a4c77fc0c6fece9f38a6587b4cad (diff) | |
| parent | 798dc6be7feabce33676877f85d307f571a9ec15 (diff) | |
| download | u-boot-imx-c98b171e1098f94b2ff7720c45a25a602882f876.zip u-boot-imx-c98b171e1098f94b2ff7720c45a25a602882f876.tar.gz u-boot-imx-c98b171e1098f94b2ff7720c45a25a602882f876.tar.bz2 | |
Merge branch 'rmobile' of git://git.denx.de/u-boot-sh
[trini: Drop CMD_BOOTI as it's now on by default on ARM64]
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'include/configs/salvator-x.h')
| -rw-r--r-- | include/configs/salvator-x.h | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/include/configs/salvator-x.h b/include/configs/salvator-x.h new file mode 100644 index 0000000..d1d615c --- /dev/null +++ b/include/configs/salvator-x.h @@ -0,0 +1,54 @@ +/* + * include/configs/salvator-x.h + * This file is Salvator-X board configuration. + * + * Copyright (C) 2015 Renesas Electronics Corporation + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __SALVATOR_X_H +#define __SALVATOR_X_H + +#undef DEBUG + +#define CONFIG_RCAR_BOARD_STRING "Salvator-X" + +#include "rcar-gen3-common.h" + +/* SCIF */ +#define CONFIG_SCIF_CONSOLE +#define CONFIG_CONS_SCIF2 +#define CONFIG_CONS_INDEX 2 +#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ + +/* [A] Hyper Flash */ +/* use to RPC(SPI Multi I/O Bus Controller) */ +#define CONFIG_SYS_NO_FLASH +#define CONFIG_ENV_IS_NOWHERE + +/* Board Clock */ +/* XTAL_CLK : 33.33MHz */ +#define RCAR_XTAL_CLK 33333333u +#define CONFIG_SYS_CLK_FREQ RCAR_XTAL_CLK +/* ch0to2 CPclk, ch3to11 S3D2_PEREclk, ch12to14 S3D2_RTclk */ +/* CPclk 16.66MHz, S3D2 133.33MHz */ +#define CONFIG_CP_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) +#define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 192 / 2) +#define CONFIG_S3D2_CLK_FREQ (266666666u/2) + +/* Generic Timer Definitions (use in assembler source) */ +#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */ + +/* Generic Interrupt Controller Definitions */ +#define CONFIG_GICV2 +#define GICD_BASE 0xF1010000 +#define GICC_BASE 0xF1020000 + +/* Module stop status bits */ +/* MFIS, SCIF1 */ +#define CONFIG_SMSTP2_ENA 0x00002040 +/* INTC-AP, IRQC */ +#define CONFIG_SMSTP4_ENA 0x00000180 + +#endif /* __SALVATOR_X_H */ |