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authorPhil Edworthy <PHIL.EDWORTHY@renesas.com>2012-02-13 02:03:50 +0000
committerNobuhiro Iwamatsu <iwamatsu@nigauri.org>2012-03-08 10:26:32 +0900
commit117029c510c75f4c6d7ecb1172635d6a08755cf8 (patch)
tree819ad596bbdaba266d81d82b9e615c4f05f23322 /include/configs/rsk7264.h
parent73dba948f57f0d69cb63ee168155c51d0c33f2b8 (diff)
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sh: Fix sh7264 clock speed and related serial setting
The generalised calculation of the serial bit rate reg also applies to sh7264, it was just the clock speed that was set incorrectly. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'include/configs/rsk7264.h')
-rw-r--r--include/configs/rsk7264.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/configs/rsk7264.h b/include/configs/rsk7264.h
index c1ffc34..af9524e 100644
--- a/include/configs/rsk7264.h
+++ b/include/configs/rsk7264.h
@@ -65,7 +65,7 @@
#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
/* Board Clock */
-#define CONFIG_SYS_CLK_FREQ 33333333
+#define CONFIG_SYS_CLK_FREQ 36000000
#define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */
#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)