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authorStefan Roese <sr@denx.de>2008-06-03 20:19:08 +0200
committerStefan Roese <sr@denx.de>2008-06-03 20:19:08 +0200
commit10a3367955bc2033b288915f8f10d0e507fe2fa1 (patch)
treec3ac82364df83db5d5cb963c64b863b77a20445c /include/configs/rsdproto.h
parent97f7d27c8ecf34879d6b747c10fa9a18c02a4cc0 (diff)
parent1f1554841a4c8e069d331176f0c3059fb2bb8280 (diff)
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Merge branch 'master' of /home/stefan/git/u-boot/u-boot
Diffstat (limited to 'include/configs/rsdproto.h')
-rw-r--r--include/configs/rsdproto.h14
1 files changed, 7 insertions, 7 deletions
diff --git a/include/configs/rsdproto.h b/include/configs/rsdproto.h
index 40a05fa..6251383 100644
--- a/include/configs/rsdproto.h
+++ b/include/configs/rsdproto.h
@@ -53,7 +53,7 @@
*/
#undef CONFIG_CONS_ON_SMC /* define if console on SMC */
#define CONFIG_CONS_ON_SCC /* define if console on SCC */
-#undef CONFIG_CONS_NONE /* define if console on neither */
+#undef CONFIG_CONS_NONE /* define if console on neither */
#define CONFIG_CONS_INDEX 1 /* which SMC/SCC channel for console */
/*
@@ -91,7 +91,7 @@
#define CONFIG_ENV_OVERWRITE
/* enable I2C */
-#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
+#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
#define CFG_I2C_SPEED 50000 /* I2C speed and slave address */
#define CFG_I2C_SLAVE 0x30
@@ -128,7 +128,7 @@
#define CFG_RSD_BOOT_LOW 1
#define CONFIG_BOOTDELAY 5
-#define CONFIG_BOOTARGS "devfs=mount root=ramfs"
+#define CONFIG_BOOTARGS "devfs=mount root=ramfs"
#define CONFIG_ETHADDR 08:00:3e:26:0a:5a
#define CONFIG_NETMASK 255.255.0.0
@@ -176,14 +176,14 @@
#define PHYS_SDRAM_LOCAL 0x40000000 /* SDRAM (Local Bus) */
#define PHYS_SDRAM_LOCAL_SIZE 0x04000000 /* 64 MB */
-#define PHYS_DPRAM_PCI 0xE8000000 /* DPRAM PPC/PCI */
-#define PHYS_DPRAM_PCI_SIZE 0x00020000 /* 128 KB */
+#define PHYS_DPRAM_PCI 0xE8000000 /* DPRAM PPC/PCI */
+#define PHYS_DPRAM_PCI_SIZE 0x00020000 /* 128 KB */
/*#define PHYS_DPRAM_PCI_SEM 0x04020000 / * DPRAM PPC/PCI Semaphore */
/*#define PHYS_DPRAM_PCI_SEM_SIZE 0x00000001 / * 1 Byte */
-#define PHYS_DPRAM_SHARC 0xE8100000 /* DPRAM PPC/Sharc */
-#define PHYS_DPRAM_SHARC_SIZE 0x00040000 /* 256 KB */
+#define PHYS_DPRAM_SHARC 0xE8100000 /* DPRAM PPC/Sharc */
+#define PHYS_DPRAM_SHARC_SIZE 0x00040000 /* 256 KB */
/*#define PHYS_DPRAM_SHARC_SEM 0x04140000 / * DPRAM PPC/Sharc Semaphore */
/*#define PHYS_DPRAM_SHARC_SEM_SIZE 0x00000001 / * 1 Byte */