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author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2008-10-16 15:01:15 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:54:03 +0200 |
commit | 6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch) | |
tree | ae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /include/configs/r7780mp.h | |
parent | 71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff) | |
download | u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.zip u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.gz u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.bz2 |
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'include/configs/r7780mp.h')
-rw-r--r-- | include/configs/r7780mp.h | 98 |
1 files changed, 49 insertions, 49 deletions
diff --git a/include/configs/r7780mp.h b/include/configs/r7780mp.h index 4f3f8e5..f85d5d6 100644 --- a/include/configs/r7780mp.h +++ b/include/configs/r7780mp.h @@ -31,7 +31,7 @@ #define CONFIG_SH4A 1 #define CONFIG_CPU_SH7780 1 #define CONFIG_R7780MP 1 -#define CFG_R7780MP_OLD_FLASH 1 +#define CONFIG_SYS_R7780MP_OLD_FLASH 1 #define __LITTLE_ENDIAN__ 1 /* @@ -60,69 +60,69 @@ /* check for keypress on bootdelay==0 */ /*#define CONFIG_ZERO_BOOTDELAY_CHECK*/ -#define CFG_SDRAM_BASE (0x08000000) -#define CFG_SDRAM_SIZE (128 * 1024 * 1024) +#define CONFIG_SYS_SDRAM_BASE (0x08000000) +#define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) -#define CFG_LONGHELP -#define CFG_PROMPT "=> " -#define CFG_CBSIZE 256 -#define CFG_PBSIZE 256 -#define CFG_MAXARGS 16 -#define CFG_BARGSIZE 512 +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_PROMPT "=> " +#define CONFIG_SYS_CBSIZE 256 +#define CONFIG_SYS_PBSIZE 256 +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_BARGSIZE 512 /* List of legal baudrate settings for this board */ -#define CFG_BAUDRATE_TABLE { 115200, 57600, 38400, 19200, 9600 } +#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 57600, 38400, 19200, 9600 } -#define CFG_MEMTEST_START (CFG_SDRAM_BASE) -#define CFG_MEMTEST_END (TEXT_BASE - 0x100000) +#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) +#define CONFIG_SYS_MEMTEST_END (TEXT_BASE - 0x100000) /* Flash board support */ -#define CFG_FLASH_BASE (0xA0000000) -#ifdef CFG_R7780MP_OLD_FLASH +#define CONFIG_SYS_FLASH_BASE (0xA0000000) +#ifdef CONFIG_SYS_R7780MP_OLD_FLASH /* NOR Flash (S29PL127J60TFI130) */ -# define CFG_FLASH_CFI_WIDTH FLASH_CFI_32BIT -# define CFG_MAX_FLASH_BANKS (2) -# define CFG_MAX_FLASH_SECT 270 -# define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE,\ - CFG_FLASH_BASE + 0x100000,\ - CFG_FLASH_BASE + 0x400000,\ - CFG_FLASH_BASE + 0x700000, } -#else /* CFG_R7780MP_OLD_FLASH */ +# define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT +# define CONFIG_SYS_MAX_FLASH_BANKS (2) +# define CONFIG_SYS_MAX_FLASH_SECT 270 +# define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE,\ + CONFIG_SYS_FLASH_BASE + 0x100000,\ + CONFIG_SYS_FLASH_BASE + 0x400000,\ + CONFIG_SYS_FLASH_BASE + 0x700000, } +#else /* CONFIG_SYS_R7780MP_OLD_FLASH */ /* NOR Flash (Spantion S29GL256P) */ -# define CFG_MAX_FLASH_BANKS (1) -# define CFG_MAX_FLASH_SECT 256 -# define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE } -#endif /* CFG_R7780MP_OLD_FLASH */ +# define CONFIG_SYS_MAX_FLASH_BANKS (1) +# define CONFIG_SYS_MAX_FLASH_SECT 256 +# define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } +#endif /* CONFIG_SYS_R7780MP_OLD_FLASH */ -#define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 4 * 1024 * 1024) +#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024) /* Address of u-boot image in Flash */ -#define CFG_MONITOR_BASE (CFG_FLASH_BASE) -#define CFG_MONITOR_LEN (256 * 1024) +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) +#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Size of DRAM reserved for malloc() use */ -#define CFG_MALLOC_LEN (1204 * 1024) +#define CONFIG_SYS_MALLOC_LEN (1204 * 1024) /* size in bytes reserved for initial data */ -#define CFG_GBL_DATA_SIZE (256) -#define CFG_BOOTMAPSZ (8 * 1024 * 1024) -#define CFG_RX_ETH_BUFFER (8) +#define CONFIG_SYS_GBL_DATA_SIZE (256) +#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) +#define CONFIG_SYS_RX_ETH_BUFFER (8) -#define CFG_FLASH_CFI +#define CONFIG_SYS_FLASH_CFI #define CONFIG_FLASH_CFI_DRIVER -#undef CFG_FLASH_CFI_BROKEN_TABLE -#undef CFG_FLASH_QUIET_TEST +#undef CONFIG_SYS_FLASH_CFI_BROKEN_TABLE +#undef CONFIG_SYS_FLASH_QUIET_TEST /* print 'E' for empty sector on flinfo */ -#define CFG_FLASH_EMPTY_INFO +#define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_ENV_IS_IN_FLASH #define CONFIG_ENV_SECT_SIZE (256 * 1024) #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) -#define CONFIG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN) -#define CFG_FLASH_ERASE_TOUT 120000 -#define CFG_FLASH_WRITE_TOUT 500 +#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) +#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 +#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Board Clock */ #define CONFIG_SYS_CLK_FREQ 33333333 #define TMU_CLK_DIVIDER 4 -#define CFG_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER) +#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER) /* PCI Controller */ #if defined(CONFIG_CMD_PCI) @@ -157,14 +157,14 @@ /* Compact flash Support */ #if defined(CONFIG_CMD_IDE) #define CONFIG_IDE_RESET 1 -#define CFG_PIO_MODE 1 -#define CFG_IDE_MAXBUS 1 /* IDE bus */ -#define CFG_IDE_MAXDEVICE 1 -#define CFG_ATA_BASE_ADDR 0xb4000000 -#define CFG_ATA_STRIDE 2 /* 1bit shift */ -#define CFG_ATA_DATA_OFFSET 0x1000 /* data reg offset */ -#define CFG_ATA_REG_OFFSET 0x1000 /* reg offset */ -#define CFG_ATA_ALT_OFFSET 0x800 /* alternate register offset */ +#define CONFIG_SYS_PIO_MODE 1 +#define CONFIG_SYS_IDE_MAXBUS 1 /* IDE bus */ +#define CONFIG_SYS_IDE_MAXDEVICE 1 +#define CONFIG_SYS_ATA_BASE_ADDR 0xb4000000 +#define CONFIG_SYS_ATA_STRIDE 2 /* 1bit shift */ +#define CONFIG_SYS_ATA_DATA_OFFSET 0x1000 /* data reg offset */ +#define CONFIG_SYS_ATA_REG_OFFSET 0x1000 /* reg offset */ +#define CONFIG_SYS_ATA_ALT_OFFSET 0x800 /* alternate register offset */ #endif /* CONFIG_CMD_IDE */ #endif /* __R7780RP_H */ |