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author | Stefano Babic <sbabic@denx.de> | 2010-08-23 20:41:19 +0200 |
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committer | Stefano Babic <sbabic@denx.de> | 2010-09-30 14:42:13 +0200 |
commit | 9f481e95baaca2a5a739f930c16b1cc485b0c1f3 (patch) | |
tree | f569b9da23b356a660168a2f2dbcc2708eff6fa0 /include/configs/qong.h | |
parent | 4d0e49d33639394d25a60a4e2d73e99634348af7 (diff) | |
download | u-boot-imx-9f481e95baaca2a5a739f930c16b1cc485b0c1f3.zip u-boot-imx-9f481e95baaca2a5a739f930c16b1cc485b0c1f3.tar.gz u-boot-imx-9f481e95baaca2a5a739f930c16b1cc485b0c1f3.tar.bz2 |
MXC: Correct SPI_CPOL setting in SPI driver
The handling of the SPI_CPOL bit inside the SPI
driver was wrong. As reported by the manual,
the meaning of the SSPOL inside the
configuration register is the same as reported
by SPI specification (0 if low in idle, 1 is high
on idle). The driver inverts this logic.
Because this patch sets the logic as specified, it is required
to clear the CPOL bit in the configuration file to adapt
to the correct logic.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: David Jander <david.jander@protonic.nl>
Diffstat (limited to 'include/configs/qong.h')
-rw-r--r-- | include/configs/qong.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/include/configs/qong.h b/include/configs/qong.h index 7cd9558..cbb53dd 100644 --- a/include/configs/qong.h +++ b/include/configs/qong.h @@ -56,14 +56,14 @@ #define CONFIG_MXC_SPI #define CONFIG_DEFAULT_SPI_BUS 1 -#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_2 | SPI_CS_HIGH) +#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH) #define CONFIG_RTC_MC13783 #define CONFIG_FSL_PMIC #define CONFIG_FSL_PMIC_BUS 1 #define CONFIG_FSL_PMIC_CS 0 #define CONFIG_FSL_PMIC_CLK 100000 -#define CONFIG_FSL_PMIC_MODE (SPI_MODE_2 | SPI_CS_HIGH) +#define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH) /* FPGA */ #define CONFIG_QONG_FPGA 1 |