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author | Wolfgang Denk <wd@denx.de> | 2010-11-12 22:24:06 +0100 |
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committer | Wolfgang Denk <wd@denx.de> | 2010-11-12 22:24:06 +0100 |
commit | d963e84c92a63b4e6c4f2f80482a5ecbe9b24fe0 (patch) | |
tree | 07dd5889d73f4b66ad608815adcf6f2f953d9501 /include/configs/pleb2.h | |
parent | 66fca016057b1c6b697552cc7220ebada9d4f82d (diff) | |
parent | 0c0892be0d93a5a892b93739c5eb3bf692fed4ff (diff) | |
download | u-boot-imx-d963e84c92a63b4e6c4f2f80482a5ecbe9b24fe0.zip u-boot-imx-d963e84c92a63b4e6c4f2f80482a5ecbe9b24fe0.tar.gz u-boot-imx-d963e84c92a63b4e6c4f2f80482a5ecbe9b24fe0.tar.bz2 |
Merge branch 'master' of /home/wd/git/u-boot/master
Diffstat (limited to 'include/configs/pleb2.h')
-rw-r--r-- | include/configs/pleb2.h | 21 |
1 files changed, 9 insertions, 12 deletions
diff --git a/include/configs/pleb2.h b/include/configs/pleb2.h index 3b6e60a..64654f8 100644 --- a/include/configs/pleb2.h +++ b/include/configs/pleb2.h @@ -39,6 +39,7 @@ #undef CONFIG_LCD #undef CONFIG_MMC #define BOARD_LATE_INIT 1 +#define CONFIG_SYS_TEXT_BASE 0x0 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ @@ -49,7 +50,6 @@ * Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ /* * Hardware drivers @@ -155,15 +155,9 @@ /* * Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 4 /* we have 2 banks of DRAM */ +#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ #define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */ #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */ -#define PHYS_SDRAM_2 0xa4000000 /* SDRAM Bank #2 */ -#define PHYS_SDRAM_2_SIZE 0x00000000 /* 0 MB */ -#define PHYS_SDRAM_3 0xa8000000 /* SDRAM Bank #3 */ -#define PHYS_SDRAM_3_SIZE 0x00000000 /* 0 MB */ -#define PHYS_SDRAM_4 0xac000000 /* SDRAM Bank #4 */ -#define PHYS_SDRAM_4_SIZE 0x00000000 /* 0 MB */ #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ #define PHYS_FLASH_2 0x04000000 /* Flash Bank #2 */ @@ -180,7 +174,7 @@ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1) +#define CONFIG_SYS_INIT_SP_ADDR (GENERATED_GBL_DATA_SIZE + PHYS_SDRAM_1) /* * GPIO settings @@ -213,9 +207,9 @@ #define CONFIG_SYS_GAFR2_U_VAL 0x00000000 #define CONFIG_SYS_PSSR_VAL 0x20 -#define CONFIG_SYS_CCCR_VAL 0x00000141 /* 100 MHz memory, 200 MHz CPU */ -#define CONFIG_SYS_CKEN_VAL 0x00000060 /* FFUART and STUART enabled */ -#define CONFIG_SYS_ICMR_VAL 0x00000000 /* No interrupts enabled */ +#define CONFIG_SYS_CCCR 0x00000141 /* 100 MHz memory, 200 MHz CPU */ +#define CONFIG_SYS_CKEN 0x00000060 /* FFUART and STUART enabled */ +#define CONFIG_SYS_ICMR 0x00000000 /* No interrupts enabled */ /* * Memory settings @@ -231,6 +225,9 @@ /* bits set in lowlevel_init.S */ #define CONFIG_SYS_MDMRS_VAL 0x00000000 +#define CONFIG_SYS_FLYCNFG_VAL 0x00000000 +#define CONFIG_SYS_SXCNFG_VAL 0x00000000 + /* * PCMCIA and CF Interfaces */ |