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author | Stefano Babic <sbabic@denx.de> | 2014-04-04 11:35:30 +0200 |
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committer | Stefano Babic <sbabic@denx.de> | 2014-04-04 11:35:30 +0200 |
commit | 1cad23c5f471d695bed1e3907e30caee3c2a3056 (patch) | |
tree | 34e035df5db9b327aeae36eff9d0645a915e3177 /include/configs/origen.h | |
parent | 5dd73bc0a40a4b318195eab871a1f535aad6b43b (diff) | |
parent | 00b132bf34c5be86a108ac7fe8231ad9e97f6de4 (diff) | |
download | u-boot-imx-1cad23c5f471d695bed1e3907e30caee3c2a3056.zip u-boot-imx-1cad23c5f471d695bed1e3907e30caee3c2a3056.tar.gz u-boot-imx-1cad23c5f471d695bed1e3907e30caee3c2a3056.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot-arm into master
Conflicts:
arch/arm/cpu/arm926ejs/mxs/mxsimage.mx23.cfg
arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg
Signed-off-by: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'include/configs/origen.h')
-rw-r--r-- | include/configs/origen.h | 110 |
1 files changed, 31 insertions, 79 deletions
diff --git a/include/configs/origen.h b/include/configs/origen.h index f46b833..8258338 100644 --- a/include/configs/origen.h +++ b/include/configs/origen.h @@ -6,115 +6,71 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#ifndef __CONFIG_H -#define __CONFIG_H +#ifndef __CONFIG_ORIGEN_H +#define __CONFIG_ORIGEN_H + +#include <configs/exynos4-dt.h> + +#define CONFIG_SYS_PROMPT "ORIGEN # " + +#undef CONFIG_DEFAULT_DEVICE_TREE +#define CONFIG_DEFAULT_DEVICE_TREE exynos4210-origen /* High Level Configuration Options */ -#define CONFIG_SAMSUNG 1 /* SAMSUNG core */ -#define CONFIG_S5P 1 /* S5P Family */ #define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */ #define CONFIG_ORIGEN 1 /* working with ORIGEN*/ -#include <asm/arch/cpu.h> /* get chip and board defs */ - -#define CONFIG_ARCH_CPU_INIT -#define CONFIG_DISPLAY_CPUINFO -#define CONFIG_DISPLAY_BOARDINFO -#define CONFIG_BOARD_EARLY_INIT_F - #define CONFIG_SYS_DCACHE_OFF 1 +/* ORIGEN has 4 bank of DRAM */ +#define CONFIG_NR_DRAM_BANKS 4 #define CONFIG_SYS_SDRAM_BASE 0x40000000 -#define CONFIG_SYS_TEXT_BASE 0x43E00000 +#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE +#define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ -/* input clock of PLL: ORIGEN has 24MHz input clock */ -#define CONFIG_SYS_CLK_FREQ 24000000 +/* memtest works on */ +#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x6000000) +#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000) -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_CMDLINE_TAG -#define CONFIG_INITRD_TAG -#define CONFIG_CMDLINE_EDITING +#define CONFIG_SYS_TEXT_BASE 0x43E00000 #define CONFIG_MACH_TYPE MACH_TYPE_ORIGEN -/* Power Down Modes */ -#define S5P_CHECK_SLEEP 0x00000BAD -#define S5P_CHECK_DIDLE 0xBAD00000 -#define S5P_CHECK_LPA 0xABAD0000 - /* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20)) +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 * SZ_1M)) /* select serial console configuration */ -#define CONFIG_SERIAL2 1 /* use SERIAL 2 */ +#define CONFIG_SERIAL2 #define CONFIG_BAUDRATE 115200 -#define EXYNOS4_DEFAULT_UART_OFFSET 0x020000 -#define CONFIG_SKIP_LOWLEVEL_INIT +/* Console configuration */ +#define CONFIG_SYS_CONSOLE_INFO_QUIET +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0" -/* SD/MMC configuration */ -#define CONFIG_GENERIC_MMC -#define CONFIG_MMC -#define CONFIG_SDHCI -#define CONFIG_S5P_SDHCI +#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */ -/* PWM */ -#define CONFIG_PWM 1 +#define CONFIG_SYS_MONITOR_BASE 0x00000000 -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE - -/* Command definition*/ -#include <config_cmd_default.h> +/* Power Down Modes */ +#define S5P_CHECK_SLEEP 0x00000BAD +#define S5P_CHECK_DIDLE 0xBAD00000 +#define S5P_CHECK_LPA 0xABAD0000 #undef CONFIG_CMD_PING #define CONFIG_CMD_ELF #define CONFIG_CMD_DHCP -#define CONFIG_CMD_MMC -#define CONFIG_CMD_FAT #undef CONFIG_CMD_NET #undef CONFIG_CMD_NFS -#define CONFIG_BOOTDELAY 3 -#define CONFIG_ZERO_BOOTDELAY_CHECK /* MMC SPL */ #define CONFIG_SPL #define COPY_BL2_FNPTR_ADDR 0x02020030 - #define CONFIG_SPL_TEXT_BASE 0x02021410 #define CONFIG_BOOTCOMMAND "fatload mmc 0 40007000 uImage; bootm 40007000" -/* Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ -#define CONFIG_SYS_PROMPT "ORIGEN # " -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size*/ -#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0" -/* Boot Argument Buffer Size */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -/* memtest works on */ -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x6000000) -#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000) - -/* ORIGEN has 4 bank of DRAM */ -#define CONFIG_NR_DRAM_BANKS 4 -#define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */ -#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE -#define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE) -#define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE)) -#define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE)) -#define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE - -/* FLASH and environment organization */ -#define CONFIG_SYS_NO_FLASH 1 -#undef CONFIG_CMD_IMLS #define CONFIG_IDENT_STRING " for ORIGEN" #define CONFIG_CLK_1000_400_200 @@ -122,13 +78,12 @@ /* MIU (Memory Interleaving Unit) */ #define CONFIG_MIU_2BIT_21_7_INTERLEAVED -#define CONFIG_ENV_IS_IN_MMC 1 +#define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_ENV_SIZE (16 << 10) /* 16 KB */ #define RESERVE_BLOCK_SIZE (512) #define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/ #define CONFIG_ENV_OFFSET (RESERVE_BLOCK_SIZE + BL1_SIZE) -#define CONFIG_DOS_PARTITION 1 #define CONFIG_SPL_LDSCRIPT "board/samsung/common/exynos-uboot-spl.lds" #define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024) @@ -140,7 +95,4 @@ #define BL2_START_OFFSET ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512) #define BL2_SIZE_BLOC_COUNT (COPY_BL2_SIZE/512) -/* Enable devicetree support */ -#define CONFIG_OF_LIBFDT - #endif /* __CONFIG_H */ |