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| author | Dirk Behme <dirk.behme@googlemail.com> | 2009-04-14 20:15:17 +0200 |
|---|---|---|
| committer | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2009-04-29 21:17:43 +0200 |
| commit | 42bf4b2248146abdc592bde0009c6ea42067f437 (patch) | |
| tree | 267891a1238208bba04f9ca5fb2fbb96f897cf4d /include/configs/omap3_overo.h | |
| parent | cba0b778dd5f1ea32959b6825c7f0a31501a99d5 (diff) | |
| download | u-boot-imx-42bf4b2248146abdc592bde0009c6ea42067f437.zip u-boot-imx-42bf4b2248146abdc592bde0009c6ea42067f437.tar.gz u-boot-imx-42bf4b2248146abdc592bde0009c6ea42067f437.tar.bz2 | |
OMAP3: Remove legacy NAND defines
Remove remaining legacy NAND defines for Beagle, EVM, Overo and Pandora.
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
Diffstat (limited to 'include/configs/omap3_overo.h')
| -rw-r--r-- | include/configs/omap3_overo.h | 30 |
1 files changed, 0 insertions, 30 deletions
diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index a8be4e6..d941497 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -128,19 +128,6 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ /* devices */ -#define SECTORSIZE 512 - -#define NAND_ALLOW_ERASE_ALL -#define ADDR_COLUMN 1 -#define ADDR_PAGE 2 -#define ADDR_COLUMN_PAGE 3 - -#define NAND_ChipID_UNKNOWN 0x00 -#define NAND_MAX_FLOORS 1 -#define NAND_MAX_CHIPS 1 -#define NAND_NO_RB 1 -#define CONFIG_SYS_NAND_WP - #define CONFIG_JFFS2_NAND /* nand device jffs2 lives on */ #define CONFIG_JFFS2_DEV "nand0" @@ -299,21 +286,4 @@ extern unsigned int boot_flash_sec; extern unsigned int boot_flash_type; #endif - -#define WRITE_NAND_COMMAND(d, adr)\ - writel(d, &nand_cs_base->nand_cmd) -#define WRITE_NAND_ADDRESS(d, adr)\ - writel(d, &nand_cs_base->nand_adr) -#define WRITE_NAND(d, adr) writew(d, &nand_cs_base->nand_dat) -#define READ_NAND(adr) readl(&nand_cs_base->nand_dat) - -/* Other NAND Access APIs */ -#define NAND_WP_OFF() do {readl(&gpmc_cfg_base->config) |= GPMC_CONFIG_WP; } \ - while (0) -#define NAND_WP_ON() do {readl(&gpmc_cfg_base->config) &= ~GPMC_CONFIG_WP; } \ - while (0) -#define NAND_DISABLE_CE(nand) -#define NAND_ENABLE_CE(nand) -#define NAND_WAIT_READY(nand) udelay(10) - #endif /* __CONFIG_H */ |