summaryrefslogtreecommitdiff
path: root/include/configs/omap3_beagle.h
diff options
context:
space:
mode:
authorWolfgang Denk <wd@denx.de>2009-04-30 23:01:08 +0200
committerWolfgang Denk <wd@denx.de>2009-04-30 23:01:08 +0200
commitccb71dfac94d4a9ef161a59a51b4f31d7d9e4747 (patch)
tree78cfc03a11b67fddaf1168bcec19a710016bdb5d /include/configs/omap3_beagle.h
parentbf2ba6d46e1046e54e1de30b4df40e384a355195 (diff)
parenta1e5f93185d0d85a4b3fad3b6c743cddcd373b0c (diff)
downloadu-boot-imx-ccb71dfac94d4a9ef161a59a51b4f31d7d9e4747.zip
u-boot-imx-ccb71dfac94d4a9ef161a59a51b4f31d7d9e4747.tar.gz
u-boot-imx-ccb71dfac94d4a9ef161a59a51b4f31d7d9e4747.tar.bz2
Merge branch 'master' of git://git.denx.de/u-boot-arm
Diffstat (limited to 'include/configs/omap3_beagle.h')
-rw-r--r--include/configs/omap3_beagle.h37
1 files changed, 7 insertions, 30 deletions
diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
index 5a948e4..d8c328f 100644
--- a/include/configs/omap3_beagle.h
+++ b/include/configs/omap3_beagle.h
@@ -41,6 +41,12 @@
#include <asm/arch/cpu.h> /* get chip and board defs */
#include <asm/arch/omap3.h>
+/*
+ * Display CPU and Board information
+ */
+#define CONFIG_DISPLAY_CPUINFO 1
+#define CONFIG_DISPLAY_BOARDINFO 1
+
/* Clock Defines */
#define V_OSCK 26000000 /* Clock output from T2 */
#define V_SCLK (V_OSCK >> 1)
@@ -135,18 +141,6 @@
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
/* devices */
-#define SECTORSIZE 512
-
-#define NAND_ALLOW_ERASE_ALL
-#define ADDR_COLUMN 1
-#define ADDR_PAGE 2
-#define ADDR_COLUMN_PAGE 3
-
-#define NAND_ChipID_UNKNOWN 0x00
-#define NAND_MAX_FLOORS 1
-#define NAND_MAX_CHIPS 1
-#define NAND_NO_RB 1
-#define CONFIG_SYS_NAND_WP
#define CONFIG_JFFS2_NAND
/* nand device jffs2 lives on */
@@ -185,7 +179,7 @@
"bootm ${loadaddr}\0" \
#define CONFIG_BOOTCOMMAND \
- "if mmcinit; then " \
+ "if mmc init; then " \
"if run loadbootscript; then " \
"run bootscript; " \
"else " \
@@ -306,21 +300,4 @@ extern unsigned int boot_flash_sec;
extern unsigned int boot_flash_type;
#endif
-
-#define WRITE_NAND_COMMAND(d, adr)\
- writel(d, &nand_cs_base->nand_cmd)
-#define WRITE_NAND_ADDRESS(d, adr)\
- writel(d, &nand_cs_base->nand_adr)
-#define WRITE_NAND(d, adr) writew(d, &nand_cs_base->nand_dat)
-#define READ_NAND(adr) readl(&nand_cs_base->nand_dat)
-
-/* Other NAND Access APIs */
-#define NAND_WP_OFF() do {readl(&gpmc_cfg_base->config) |= GPMC_CONFIG_WP; } \
- while (0)
-#define NAND_WP_ON() do {readl(&gpmc_cfg_base->config) &= ~GPMC_CONFIG_WP; } \
- while (0)
-#define NAND_DISABLE_CE(nand)
-#define NAND_ENABLE_CE(nand)
-#define NAND_WAIT_READY(nand) udelay(10)
-
#endif /* __CONFIG_H */