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author | Aneesh V <aneesh@ti.com> | 2011-06-09 08:54:55 -0400 |
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committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2011-06-21 22:26:21 +0200 |
commit | 3712982019526042d339f5e8208449fe209c666f (patch) | |
tree | 46caeeff79b27d5c7908f6e9d0f9e7ed8a08d818 /include/configs/omap2420h4.h | |
parent | 574fa1f02e195c892c4f2255480d925491f0de45 (diff) | |
download | u-boot-imx-3712982019526042d339f5e8208449fe209c666f.zip u-boot-imx-3712982019526042d339f5e8208449fe209c666f.tar.gz u-boot-imx-3712982019526042d339f5e8208449fe209c666f.tar.bz2 |
omap2420h4: fix build breaks
DRAM base address and use SRAM for initial stack
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Diffstat (limited to 'include/configs/omap2420h4.h')
-rw-r--r-- | include/configs/omap2420h4.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/configs/omap2420h4.h b/include/configs/omap2420h4.h index 2888c7b..01f402b 100644 --- a/include/configs/omap2420h4.h +++ b/include/configs/omap2420h4.h @@ -220,6 +220,7 @@ #define PHYS_FLASH_2 (H4_CS0_BASE+SZ_32M) /* same cs, 2 chips in series */ #define PHYS_FLASH_SIZE_2 SZ_32M +#define PHYS_SRAM 0x4020F800 /*----------------------------------------------------------------------- * FLASH and environment organization */ @@ -271,4 +272,7 @@ #define MTDPARTS_DEFAULT "mtdparts=omap2420-1:-(jffs2)" */ +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_SP_ADDR PHYS_SRAM + #endif /* __CONFIG_H */ |