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| author | Ye.Li <B37916@freescale.com> | 2015-12-17 11:39:09 +0800 |
|---|---|---|
| committer | guoyin.chen <guoyin.chen@freescale.com> | 2016-03-04 15:35:51 +0800 |
| commit | 643b7063e7733fc5dd88f5429915bb09331f2b69 (patch) | |
| tree | dc01b2fb9104a5fca5e3a56f4f1647b1cd21bb14 /include/configs/mx7dsabresd.h | |
| parent | 129e786c0dc1fcafb19c3cacee243175bed56143 (diff) | |
| download | u-boot-imx-643b7063e7733fc5dd88f5429915bb09331f2b69.zip u-boot-imx-643b7063e7733fc5dd88f5429915bb09331f2b69.tar.gz u-boot-imx-643b7063e7733fc5dd88f5429915bb09331f2b69.tar.bz2 | |
MLK-12034 imx: mx7dsabresd: Add RevB board support
Since i.MX7D SDB revB board has some HW changes, we have modify the BSP file to support new pinmux.
1. OTG2 PWR pin is changed to GPIO1_IO07.
2. A enet2_en pin is added for isolating enet2 signals with EPDC, we also add support for enet2.
3. pin6 of 74LV output is changed for CSI PWDN. Set output to high to power down it.
This patch also tries to get the board id and apply changes according with it. Since current
RevB board does not burn GP1 fuse for board id, we have to check the TO rev instead even it is not very
exact. Will update this if any new way implemented.
Signed-off-by: Ye.Li <B37916@freescale.com>
Diffstat (limited to 'include/configs/mx7dsabresd.h')
| -rw-r--r-- | include/configs/mx7dsabresd.h | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index faf36fc..02aee51 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -80,14 +80,21 @@ #define CONFIG_MII #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" -#define CONFIG_FEC_MXC_PHYADDR 0 - #define CONFIG_PHYLIB #define CONFIG_PHY_BROADCOM #define CONFIG_FEC_DMA_MINALIGN 64 -/* ENET1 */ +#define CONFIG_FEC_ENET_DEV 0 + +#if (CONFIG_FEC_ENET_DEV == 0) #define IMX_FEC_BASE ENET_IPS_BASE_ADDR +#define CONFIG_FEC_MXC_PHYADDR 0x0 +#elif (CONFIG_FEC_ENET_DEV == 1) +#define IMX_FEC_BASE ENET2_IPS_BASE_ADDR +#define CONFIG_FEC_MXC_PHYADDR 0x1 +#endif + +#define CONFIG_FEC_MXC_MDIO_BASE ENET_IPS_BASE_ADDR /* PMIC */ #define CONFIG_POWER |