diff options
| author | Ye Li <ye.li@nxp.com> | 2017-03-08 14:36:53 +0800 |
|---|---|---|
| committer | Ye Li <ye.li@nxp.com> | 2017-04-05 14:06:24 +0800 |
| commit | 62c6437a7d3b07965d35f86c5bc53d4b27686230 (patch) | |
| tree | 1cbc2d4b4d54ae338d52c9067d8a1fcd4f7e162c /include/configs/mx6ul_14x14_lpddr2_arm2.h | |
| parent | b224cafc1c2eed90afc05e61d00366e56c1a8b5d (diff) | |
| download | u-boot-imx-62c6437a7d3b07965d35f86c5bc53d4b27686230.zip u-boot-imx-62c6437a7d3b07965d35f86c5bc53d4b27686230.tar.gz u-boot-imx-62c6437a7d3b07965d35f86c5bc53d4b27686230.tar.bz2 | |
MLK-14382-1 mx6ularm2: Add DDR3 and LPDDR2 ARM2 board codes
Move the mx6ul DDR3/LPDDR2 ARM2 boards codes from v2016.03 u-boot as
the base for OF_CONTROL enabling.
Signed-off-by: Ye Li <ye.li@nxp.com>
Diffstat (limited to 'include/configs/mx6ul_14x14_lpddr2_arm2.h')
| -rw-r--r-- | include/configs/mx6ul_14x14_lpddr2_arm2.h | 82 |
1 files changed, 82 insertions, 0 deletions
diff --git a/include/configs/mx6ul_14x14_lpddr2_arm2.h b/include/configs/mx6ul_14x14_lpddr2_arm2.h new file mode 100644 index 0000000..d0d74c5 --- /dev/null +++ b/include/configs/mx6ul_14x14_lpddr2_arm2.h @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2015 Freescale Semiconductor, Inc. + * + * Configuration settings for the Freescale i.MX6UL 14x14 LPDDR2 ARM2. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#ifndef __MX6UL_14X14_LPDDR2_ARM2_CONFIG_H +#define __MX6UL_14X14_LPDDR2_ARM2_CONFIG_H + +#define CONFIG_DEFAULT_FDT_FILE "imx6ul-14x14-lpddr2-arm2.dtb" + +#ifdef CONFIG_SYS_BOOT_QSPI +#define CONFIG_SYS_USE_QSPI +#define CONFIG_ENV_IS_IN_SPI_FLASH +#elif defined CONFIG_SYS_BOOT_SPINOR +#define CONFIG_SYS_USE_SPINOR +#define CONFIG_ENV_IS_IN_SPI_FLASH +#elif defined CONFIG_SYS_BOOT_EIMNOR +#define CONFIG_SYS_USE_EIMNOR +#define CONFIG_ENV_IS_IN_FLASH +#define CONFIG_SYS_FLASH_PROTECTION +#elif defined CONFIG_SYS_BOOT_NAND +#define CONFIG_SYS_USE_NAND +#define CONFIG_ENV_IS_IN_NAND +#else +#define CONFIG_ENV_IS_IN_MMC +#endif + +#define CONFIG_VIDEO +#ifdef CONFIG_SYS_BOOT_EIMNOR +/* + * Conflicts with SD1/SD2/VIDEO/ENET + * ENET is keeped, since only RXER conflicts. + * If removed ENET, we can not boot kernel, since sd1/sd2 is disabled + * when support weimnor. + */ +#undef CONFIG_FSL_USDHC +#undef CONFIG_VIDEO +#endif + +#define BOOTARGS_CMA_SIZE "cma=96M " + +#include "mx6ul_arm2.h" + +#define PHYS_SDRAM_SIZE SZ_256M + +#ifdef CONFIG_SYS_USE_SPINOR +#define CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 1 +#define CONFIG_SF_DEFAULT_SPEED 20000000 +#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) +#define CONFIG_SF_DEFAULT_CS 0 +#endif + +#ifdef CONFIG_CMD_NET +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_FEC_MXC +#define CONFIG_MII +#define CONFIG_FEC_ENET_DEV 1 /* The ENET1 has pin conflict with UART1 */ + +#if (CONFIG_FEC_ENET_DEV == 0) +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_FEC_MXC_PHYADDR 0x2 +#define CONFIG_FEC_XCV_TYPE MII100 +#elif (CONFIG_FEC_ENET_DEV == 1) +#define IMX_FEC_BASE ENET2_BASE_ADDR +#define CONFIG_FEC_MXC_PHYADDR 0x1 +#define CONFIG_FEC_XCV_TYPE RMII +#endif +#define CONFIG_ETHPRIME "FEC" + +#define CONFIG_PHYLIB +#define CONFIG_PHY_MICREL +#endif + +#endif |