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author | Alejandro Sierra <b18039@freescale.com> | 2012-10-12 16:43:36 -0500 |
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committer | Alejandro Sierra <b18039@freescale.com> | 2012-10-12 16:43:36 -0500 |
commit | 17d38b4648c2212472d76a6c02a966c54917b435 (patch) | |
tree | 8cc425305804e9d7311f8b820f817e50b6491c5e /include/configs/mx6dl_sabreauto.h | |
parent | 3070c9de03f1b742a27319b246835fd7c7f60b53 (diff) | |
download | u-boot-imx-17d38b4648c2212472d76a6c02a966c54917b435.zip u-boot-imx-17d38b4648c2212472d76a6c02a966c54917b435.tar.gz u-boot-imx-17d38b4648c2212472d76a6c02a966c54917b435.tar.bz2 |
ENGR00229456 Support for 64bit DDR configuration for ARD
Added support for 64bit DDR configuration
on DL chip. On ARD platform
Signed-off-by: Alejandro Sierra <b18039@freescale.com>
Diffstat (limited to 'include/configs/mx6dl_sabreauto.h')
-rw-r--r-- | include/configs/mx6dl_sabreauto.h | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/include/configs/mx6dl_sabreauto.h b/include/configs/mx6dl_sabreauto.h index 1288947..f92d14c 100644 --- a/include/configs/mx6dl_sabreauto.h +++ b/include/configs/mx6dl_sabreauto.h @@ -28,8 +28,7 @@ #define CONFIG_ARMV7 /* This is armv7 Cortex-A9 CPU core */ #define CONFIG_MXC #define CONFIG_MX6DL -#define CONFIG_MX6SOLO_DDR3 -#define CONFIG_DDR_32BIT +#define CONFIG_MX6DL_DDR3 #define CONFIG_MX6Q_SABREAUTO #define CONFIG_FLASH_HEADER #define CONFIG_FLASH_HEADER_OFFSET 0x400 |