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| author | Lily Zhang <r58066@freescale.com> | 2010-01-18 16:17:06 +0800 |
|---|---|---|
| committer | Lily Zhang <r58066@freescale.com> | 2010-01-18 18:57:05 +0800 |
| commit | 8a42ad8f7feea158bf3589a90981f7499032a5cd (patch) | |
| tree | de12a02fc7f324f2e366b4fdc029b0951f49b31f /include/configs/mx51_bbg.h | |
| parent | ef152c3b768e8e579b5ce7646ffd39d8434f4812 (diff) | |
| download | u-boot-imx-8a42ad8f7feea158bf3589a90981f7499032a5cd.zip u-boot-imx-8a42ad8f7feea158bf3589a90981f7499032a5cd.tar.gz u-boot-imx-8a42ad8f7feea158bf3589a90981f7499032a5cd.tar.bz2 | |
ENGR00120202 MX51: enable L2 cache
Enable L2 cache in MX51 for uboot and kernel
Signed-off-by: Lily Zhang <r58066@freescale.com>
Diffstat (limited to 'include/configs/mx51_bbg.h')
| -rw-r--r-- | include/configs/mx51_bbg.h | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/include/configs/mx51_bbg.h b/include/configs/mx51_bbg.h index c5c3ae9..aee33ba 100644 --- a/include/configs/mx51_bbg.h +++ b/include/configs/mx51_bbg.h @@ -1,7 +1,7 @@ /* * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de> * - * (C) Copyright 2009 Freescale Semiconductor, Inc. + * (C) Copyright 2009-2010 Freescale Semiconductor, Inc. * * Configuration settings for the MX51-3Stack Freescale board. * @@ -28,7 +28,6 @@ /* High Level Configuration Options */ #define CONFIG_ARMV7 1 /* This is armv7 Cortex-A8 CPU core */ -#define CONFIG_L2_OFF #define CONFIG_MXC 1 #define CONFIG_MX51_BBG 1 /* in a mx51 */ |