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| author | Terry Lv <r65388@freescale.com> | 2010-11-04 22:20:06 +0800 |
|---|---|---|
| committer | Terry Lv <r65388@freescale.com> | 2010-11-18 18:30:59 +0800 |
| commit | 3a13770bd01f785ce7e587c398c47436b6fa703f (patch) | |
| tree | b2878101d171e3444525652783ad35ebc14cf2f2 /include/configs/mx50_rdp.h | |
| parent | e8c198f66e017cd2adf8757ec7c5deee2766d2a4 (diff) | |
| download | u-boot-imx-3a13770bd01f785ce7e587c398c47436b6fa703f.zip u-boot-imx-3a13770bd01f785ce7e587c398c47436b6fa703f.tar.gz u-boot-imx-3a13770bd01f785ce7e587c398c47436b6fa703f.tar.bz2 | |
ENGR00133124: Add nand support for mx50 rdp
Add nand support for mx50 rdp.
Signed-off-by: Terry Lv <r65388@freescale.com>
Diffstat (limited to 'include/configs/mx50_rdp.h')
| -rw-r--r-- | include/configs/mx50_rdp.h | 45 |
1 files changed, 39 insertions, 6 deletions
diff --git a/include/configs/mx50_rdp.h b/include/configs/mx50_rdp.h index fcfe4e0..b65afde 100644 --- a/include/configs/mx50_rdp.h +++ b/include/configs/mx50_rdp.h @@ -33,8 +33,10 @@ #define CONFIG_SKIP_RELOCATE_UBOOT +/* #define CONFIG_ARCH_CPU_INIT #define CONFIG_ARCH_MMU +*/ #define CONFIG_MX50_HCLK_FREQ 24000000 #define CONFIG_SYS_PLL2_FREQ 400 @@ -131,7 +133,7 @@ * Miscellaneous configurable options */ #define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "RDP U-Boot > " +#define CONFIG_SYS_PROMPT "MX50_RDP U-Boot > " #define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ /* Print Buffer Size */ @@ -166,11 +168,14 @@ * I2C Configs */ #define CONFIG_CMD_I2C 1 -#define CONFIG_HARD_I2C 1 -#define CONFIG_I2C_MXC 1 -#define CONFIG_SYS_I2C_PORT I2C2_BASE_ADDR -#define CONFIG_SYS_I2C_SPEED 100000 -#define CONFIG_SYS_I2C_SLAVE 0xfe + +#ifdef CONFIG_CMD_I2C + #define CONFIG_HARD_I2C 1 + #define CONFIG_I2C_MXC 1 + #define CONFIG_SYS_I2C_PORT I2C2_BASE_ADDR + #define CONFIG_SYS_I2C_SPEED 100000 + #define CONFIG_SYS_I2C_SLAVE 0xfe +#endif /* @@ -209,8 +214,36 @@ /* Indicate to esdhc driver which ports support 8-bit data */ #define CONFIG_MMC_8BIT_PORTS 0x6 /* ports 1 and 2 */ +#endif + +/* + * GPMI Nand Configs + */ +#define CONFIG_CMD_NAND + +#ifdef CONFIG_CMD_NAND + #define CONFIG_NAND_GPMI + #define CONFIG_GPMI_NFC_SWAP_BLOCK_MARK + #define CONFIG_GPMI_NFC_V2 + #define CONFIG_GPMI_REG_BASE GPMI_BASE_ADDR + #define CONFIG_BCH_REG_BASE BCH_BASE_ADDR + + #define NAND_MAX_CHIPS 8 + #define CONFIG_SYS_NAND_BASE 0x40000000 + #define CONFIG_SYS_MAX_NAND_DEVICE 1 #endif + +/* + * APBH DMA Configs + */ +#define CONFIG_APBH_DMA + +#ifdef CONFIG_APBH_DMA + #define CONFIG_APBH_DMA_V2 + #define CONFIG_MXS_DMA_REG_BASE ABPHDMA_BASE_ADDR +#endif + /*----------------------------------------------------------------------- * Stack sizes * |