diff options
| author | Terry Lv <r65388@freescale.com> | 2010-09-05 18:27:46 +0800 |
|---|---|---|
| committer | Terry Lv <r65388@freescale.com> | 2010-09-19 23:25:21 +0800 |
| commit | 6537dffd192344d8c786a037bce9f41db5448fc9 (patch) | |
| tree | 0500e0c88f7b0c9c6675d14fad3563267b419936 /include/configs/mx50_arm2.h | |
| parent | 1e981afa607f3e04691fa8f05dc7c37070702845 (diff) | |
| download | u-boot-imx-6537dffd192344d8c786a037bce9f41db5448fc9.zip u-boot-imx-6537dffd192344d8c786a037bce9f41db5448fc9.tar.gz u-boot-imx-6537dffd192344d8c786a037bce9f41db5448fc9.tar.bz2 | |
ENGR00127167: Add gpmi nfc and apbh dma support for mx50.
Add gpmi nfc and apbh dma support for mx50.
Signed-off-by: Terry Lv <r65388@freescale.com>
Diffstat (limited to 'include/configs/mx50_arm2.h')
| -rw-r--r-- | include/configs/mx50_arm2.h | 46 |
1 files changed, 39 insertions, 7 deletions
diff --git a/include/configs/mx50_arm2.h b/include/configs/mx50_arm2.h index c7f8faf..48bd307 100644 --- a/include/configs/mx50_arm2.h +++ b/include/configs/mx50_arm2.h @@ -33,8 +33,10 @@ #define CONFIG_SKIP_RELOCATE_UBOOT +/* #define CONFIG_ARCH_CPU_INIT #define CONFIG_ARCH_MMU +*/ #define CONFIG_MX50_HCLK_FREQ 24000000 #define CONFIG_SYS_PLL2_FREQ 400 @@ -68,8 +70,8 @@ /* * Hardware drivers */ -#define CONFIG_MX50_UART 1 -#define CONFIG_MX50_UART1 1 +#define CONFIG_MXC_UART +#define CONFIG_UART_BASE_ADDR UART1_BASE_ADDR /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE @@ -195,12 +197,17 @@ /* * I2C Configs */ +/* #define CONFIG_CMD_I2C 1 -#define CONFIG_HARD_I2C 1 -#define CONFIG_I2C_MXC 1 -#define CONFIG_SYS_I2C_PORT I2C2_BASE_ADDR -#define CONFIG_SYS_I2C_SPEED 100000 -#define CONFIG_SYS_I2C_SLAVE 0xfe +*/ + +#ifdef CONFIG_CMD_I2C + #define CONFIG_HARD_I2C 1 + #define CONFIG_I2C_MXC 1 + #define CONFIG_SYS_I2C_PORT I2C2_BASE_ADDR + #define CONFIG_SYS_I2C_SPEED 100000 + #define CONFIG_SYS_I2C_SLAVE 0xfe +#endif /* @@ -241,6 +248,31 @@ #define CONFIG_MMC_8BIT_PORTS 0x6 /* ports 1 and 2 */ #endif + +/* + * GPMI Nand Configs + */ +#define CONFIG_CMD_NAND + +#ifdef CONFIG_CMD_NAND + #define CONFIG_NAND_GPMI + #define CONFIG_GPMI_NFC_SWAP_BLOCK_MARK + #define CONFIG_GPMI_NFC_V2 + + #define CONFIG_GPMI_REG_BASE GPMI_BASE_ADDR + #define CONFIG_BCH_REG_BASE BCH_BASE_ADDR + + #define NAND_MAX_CHIPS 8 + #define CONFIG_SYS_NAND_BASE 0x40000000 + #define CONFIG_SYS_MAX_NAND_DEVICE 1 +#endif + +/* + * APBH DMA Configs + */ +#define CONFIG_APBH_DMA +#define CONFIG_MXS_DMA_REG_BASE ABPHDMA_BASE_ADDR + /*----------------------------------------------------------------------- * Stack sizes * |