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authorTerry Lv <r65388@freescale.com>2011-09-16 16:48:44 +0800
committerTerry Lv <r65388@freescale.com>2011-10-18 10:13:57 +0800
commite7cdad7018f5921a651d06ef84a01b0c0dd7a5f1 (patch)
tree09f71121ed0341461cb2325060f677450582eb5f /include/configs/mx35_3stack_mmc.h
parent856b3602d1f175706ceb54df4388e406bd3c6ff5 (diff)
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ENGR00156930: Update MX35 DDR2 scripts
Update MX35 DDR2 scripts for that when enabling 256MB, the CSD1 is not stable. 1. Add CSD1 configs to support 256M RAM. 2. Add mx35 TO2 256M RAM configs. 3. Update DDR init code in lowlevel_init.S for external boot. Signed-off-by: Terry Lv <r65388@freescale.com>
Diffstat (limited to 'include/configs/mx35_3stack_mmc.h')
-rw-r--r--include/configs/mx35_3stack_mmc.h16
1 files changed, 13 insertions, 3 deletions
diff --git a/include/configs/mx35_3stack_mmc.h b/include/configs/mx35_3stack_mmc.h
index 727f926..5c2ebf6 100644
--- a/include/configs/mx35_3stack_mmc.h
+++ b/include/configs/mx35_3stack_mmc.h
@@ -187,11 +187,21 @@
/*-----------------------------------------------------------------------
* Physical Memory Map
*/
-#define CONFIG_NR_DRAM_BANKS 1
+#define CONFIG_MX35_256M_RAM
#define PHYS_SDRAM_1 CSD0_BASE_ADDR
#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
-#define iomem_valid_addr(addr, size) \
- (addr >= PHYS_SDRAM_1 && addr <= (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE))
+#ifdef CONFIG_MX35_256M_RAM
+ #define CONFIG_NR_DRAM_BANKS 2
+ #define PHYS_SDRAM_2 CSD1_BASE_ADDR
+ #define PHYS_SDRAM_2_SIZE (128 * 1024 * 1024)
+ #define iomem_valid_addr(addr, size) \
+ ((addr >= PHYS_SDRAM_1 && addr <= (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE)) \
+ || (addr >= PHYS_SDRAM_2 && addr <= (PHYS_SDRAM_2 + PHYS_SDRAM_2_SIZE)))
+#else
+ #define CONFIG_NR_DRAM_BANKS 1
+ #define iomem_valid_addr(addr, size) \
+ (addr >= PHYS_SDRAM_1 && addr <= (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE))
+#endif
/*
* MMC Configs