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author | Stefan Roese <sr@denx.de> | 2006-02-28 15:33:28 +0100 |
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committer | Stefan Roese <sr@denx.de> | 2006-02-28 15:33:28 +0100 |
commit | 58ad4978330aefd6bdce72906f809bcfb6c94710 (patch) | |
tree | 84178743cb494c7c98409e4b86339cc67f4e9189 /include/configs/mcc200.h | |
parent | 79b4cda076069d04122f0d863bcb822b5e596c93 (diff) | |
download | u-boot-imx-58ad4978330aefd6bdce72906f809bcfb6c94710.zip u-boot-imx-58ad4978330aefd6bdce72906f809bcfb6c94710.tar.gz u-boot-imx-58ad4978330aefd6bdce72906f809bcfb6c94710.tar.bz2 |
Convert mcc200 to use common CFI flash driver
Patch by Stefan Roese, 28 Feb 2006
Diffstat (limited to 'include/configs/mcc200.h')
-rw-r--r-- | include/configs/mcc200.h | 159 |
1 files changed, 42 insertions, 117 deletions
diff --git a/include/configs/mcc200.h b/include/configs/mcc200.h index 5f1fd88..a8a8934 100644 --- a/include/configs/mcc200.h +++ b/include/configs/mcc200.h @@ -52,15 +52,11 @@ #define CONFIG_BAUDRATE 115200 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } - -//###CHD: MPC5100 gibt es nicht -> weg damit! -#ifdef CONFIG_MPC5200 /* MPC5100 PCI is not supported yet. */ /* * PCI Mapping: * 0x40000000 - 0x4fffffff - PCI Memory * 0x50000000 - 0x50ffffff - PCI IO Space */ -//Wenn geht PCI raus! #define CONFIG_PCI 1 #define CONFIG_PCI_PNP 1 #define CONFIG_PCI_SCAN_SHOW 1 @@ -82,12 +78,6 @@ #define ADD_PCI_CMD CFG_CMD_PCI -#else /* MPC5100 */ - -#define ADD_PCI_CMD 0 /* no CFG_CMD_PCI */ - -#endif - /* Partitions */ #define CONFIG_DOS_PARTITION @@ -100,12 +90,7 @@ #define ADD_USB_CMD 0 #endif -//###CHD: BOOTROm raus! -#if defined(CONFIG_BOOT_ROM) -#define ADD_DOC_CMD 0 -#else #define ADD_DOC_CMD CFG_CMD_DOC -#endif /* * Supported commands @@ -120,7 +105,6 @@ CFG_CMD_EEPROM | \ CFG_CMD_FAT | \ CFG_CMD_I2C | \ - CFG_CMD_IDE | \ CFG_CMD_NFS | \ CFG_CMD_SNTP ) @@ -140,7 +124,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ - "hostname=lmpc\0" \ + "hostname=mcc200\0" \ "nfsargs=setenv bootargs root=/dev/nfs rw " \ "nfsroot=${serverip}:${rootpath}\0" \ "ramargs=setenv bootargs root=/dev/ram rw\0" \ @@ -152,24 +136,28 @@ "flash_self=run ramargs addip;" \ "bootm ${kernel_addr} ${ramdisk_addr}\0" \ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \ - "rootpath=/opt/eldk30/ppc_82xx\0" \ - "bootfile=/tftpboot/LMPC/uImage\0" \ + "rootpath=/opt/eldk/ppc_82xx\0" \ + "bootfile=/tftpboot/mcc200/uImage\0" \ "baudrate=115200\0" \ - "serverip=192.168.0.1\0" \ - "ipaddr=192.168.0.2\0" \ - "ethaddr=00:02:44:7d:73:3b\0" \ + "load=tftp 100000 /tftpboot/mcc200/u-boot.bin\0" \ + "update=protect off fff00000 fff3ffff;era fff00000 fff3ffff;" \ + "cp.b 100000 fff00000 40000;" \ + "setenv filesize;saveenv\0" \ + "upd=run load;run update\0" \ + "serverip=192.168.1.1\0" \ + "ipaddr=192.168.133.144\0" \ + "netmask=255.255.0.0\0" \ + "unlock=yes\0" \ + "ethaddr=00:02:44:7d:73:3b\0" \ "" #define CONFIG_BOOTCOMMAND "run flash_self" -#if defined(CONFIG_MPC5200) /* * IPB Bus clocking configuration. */ #undef CFG_IPBSPEED_133 /* define for 133MHz speed */ -#endif -//###CHD: EEProm config RTC config sollte raus, gibt es nciht bei uns auf I2C! /* * I2C configuration */ @@ -193,11 +181,9 @@ #define CONFIG_RTC_PCF8563 #define CFG_I2C_RTC_ADDR 0x51 -//###CHD: meiner Ansicht nach auch raus! /* * Disk-On-Chip configuration */ - #define CFG_DOC_SHORT_TIMEOUT #define CFG_MAX_DOC_DEVICE 1 /* Max number of DOC devices */ @@ -206,56 +192,46 @@ #define CFG_DOC_BASE 0xE0000000 #define CFG_DOC_SIZE 0x00100000 -//###CHD: BOOTROm raus! -#if defined(CONFIG_BOOT_ROM) /* * Flash configuration (8,16 or 32 MB) * TEXT base always at 0xFFF00000 * ENV_ADDR always at 0xFFF40000 - * FLASH_BASE at 0xFC000000 for 32 MB - * 0xFD000000 for 16 MB - * 0xFD800000 for 8 MB - */ -#define CFG_FLASH_BASE 0xfc000000 -#define CFG_FLASH_SIZE 0x02000000 -#define CFG_BOOTROM_BASE 0xFFF00000 -#define CFG_BOOTROM_SIZE 0x00080000 -#define CFG_ENV_ADDR (0xFDF00000 + 0x40000) -#else -/* - * Flash configuration (8,16 or 32 MB) - * TEXT base always at 0xFFF00000 - * ENV_ADDR always at 0xFFF40000 - * FLASH_BASE at 0xFE000000 for 32 MB + * FLASH_BASE at 0xFC000000 for 64 MB (only 32MB are supported, not enough addr lines!!!) + * 0xFE000000 for 32 MB * 0xFF000000 for 16 MB * 0xFF800000 for 8 MB */ -#define CFG_FLASH_BASE 0xfe000000 -#define CFG_FLASH_SIZE 0x02000000 -#define CFG_ENV_ADDR (0xFFF00000 + 0x40000) -#endif -#define CFG_MAX_FLASH_BANKS 1 /* max num of memory banks */ +#define CFG_FLASH_BASE 0xfc000000 +#define CFG_FLASH_SIZE 0x04000000 -#define CFG_MAX_FLASH_SECT 128 /* max num of sects on one chip */ +#define CFG_FLASH_CFI /* The flash is CFI compatible */ +#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */ -#define CFG_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */ -#define CFG_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */ -#define CFG_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */ -#define CFG_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */ -#define CFG_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ +#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE } -#define PHYS_FLASH_SECT_SIZE 0x00040000 /* 256 KB sectors (x2) */ +#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ +#define CFG_MAX_FLASH_SECT 512 /* max number of sectors on one chip */ -#undef CONFIG_FLASH_16BIT /* Flash is 32-bit */ +#define CFG_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */ +#define CFG_FLASH_PROTECTION 1 /* hardware flash protection */ +#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ +#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ -/* - * Environment settings - */ -#define CFG_ENV_IS_IN_FLASH 1 -#define CFG_ENV_SIZE 0x10000 -#define CFG_ENV_SECT_SIZE 0x40000 -#define CONFIG_ENV_OVERWRITE 1 +#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ +#define CFG_FLASH_QUIET_TEST 1 /* don't warn upon unknown flash */ + +#define CFG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */ + +#define CFG_ENV_SECT_SIZE 0x40000 /* size of one complete sector */ +#define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN) +#define CFG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */ + +/* Address and size of Redundant Environment Sector */ +#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE) +#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE) + +#define CONFIG_ENV_OVERWRITE 1 /* allow modification of vendor params */ /* * Memory map @@ -279,7 +255,7 @@ #endif #define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ -#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ +#define CFG_MALLOC_LEN (512 << 10) /* Reserve 512 kB for malloc() */ #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ /* @@ -290,7 +266,7 @@ * Define CONFIG_FEC_10MBIT to force FEC at 10Mb */ /* #define CONFIG_FEC_10MBIT 1 */ -#define CONFIG_PHY_ADDR 0x00 +#define CONFIG_PHY_ADDR 1 /* * GPIO configuration @@ -324,25 +300,9 @@ /* * Various low-level settings */ -#if defined(CONFIG_MPC5200) #define CFG_HID0_INIT HID0_ICE | HID0_ICFI #define CFG_HID0_FINAL HID0_ICE -#else -#define CFG_HID0_INIT 0 -#define CFG_HID0_FINAL 0 -#endif -//###CHD: hier sollte das BOOT_ROM raus! -#if defined(CONFIG_BOOT_ROM) -#define CFG_BOOTCS_START CFG_BOOTROM_BASE -#define CFG_BOOTCS_SIZE CFG_BOOTROM_SIZE -#define CFG_BOOTCS_CFG 0x00047800 -#define CFG_CS0_START CFG_BOOTROM_BASE -#define CFG_CS0_SIZE CFG_BOOTROM_SIZE -#define CFG_CS1_START CFG_FLASH_BASE -#define CFG_CS1_SIZE CFG_FLASH_SIZE -#define CFG_CS1_CFG 0x0004fb00 -#else #define CFG_BOOTCS_START CFG_FLASH_BASE #define CFG_BOOTCS_SIZE CFG_FLASH_SIZE #define CFG_BOOTCS_CFG 0x0004fb00 @@ -351,7 +311,6 @@ #define CFG_CS1_START CFG_DOC_BASE #define CFG_CS1_SIZE CFG_DOC_SIZE #define CFG_CS1_CFG 0x00047800 -#endif #define CFG_CS_BURST 0x00000000 #define CFG_CS_DEADCYCLE 0x33333333 @@ -365,38 +324,4 @@ #define CONFIG_USB_CLOCK 0x0001BBBB #define CONFIG_USB_CONFIG 0x00005000 -/*----------------------------------------------------------------------- - * IDE/ATA stuff Supports IDE harddisk - *----------------------------------------------------------------------- - */ - -//###CHD: eigentlich das ganze IDE zeugs raus (IDE wird derzeit nciht mehr gescannt!) -#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */ - -#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ -#undef CONFIG_IDE_LED /* LED for ide not supported */ - -#undef CONFIG_IDE_RESET /* reset for ide supported */ -#define CONFIG_IDE_PREINIT -#undef CONFIG_IDE_PREINIT - -#define CFG_IDE_MAXBUS 0 /* max. 1 IDE bus */ -#define CFG_IDE_MAXDEVICE 2 /* max. 2 drive per IDE bus */ - -#define CFG_ATA_IDE0_OFFSET 0x0000 - -#define CFG_ATA_BASE_ADDR MPC5XXX_ATA - -/* Offset for data I/O */ -#define CFG_ATA_DATA_OFFSET (0x0060) - -/* Offset for normal register accesses */ -#define CFG_ATA_REG_OFFSET (CFG_ATA_DATA_OFFSET) - -/* Offset for alternate registers */ -#define CFG_ATA_ALT_OFFSET (0x005C) - -/* Interval between registers */ -#define CFG_ATA_STRIDE 4 - #endif /* __CONFIG_H */ |