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authorAnatolij Gustschin <agust@denx.de>2007-07-26 15:08:01 +0200
committerStefan Roese <sr@denx.de>2007-07-26 15:08:01 +0200
commitb66091de6c7390620312c2501db23d8391e7cabb (patch)
tree30b069603610b4894d8bcdfb05c7c9a165a96e2d /include/configs/lwmon5.h
parent9f24a808f17fc0f37b7fb4805f734741335caecc (diff)
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ppc4xx: lwmon5: Update Lime initialization
Change Lime SDRAM initialization to now support 100MHz and 133MHz (if enabled). Also the framebuffer is initialized to display a blue rectangle with a white border. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'include/configs/lwmon5.h')
-rw-r--r--include/configs/lwmon5.h16
1 files changed, 13 insertions, 3 deletions
diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h
index 55e2c94..b09b478 100644
--- a/include/configs/lwmon5.h
+++ b/include/configs/lwmon5.h
@@ -341,14 +341,24 @@
* Graphics (Fujitsu Lime)
*----------------------------------------------------------------------*/
/* SDRAM Clock frequency adjustment register */
-#define CFG_LIME_SDRAM_CLOCK 0xC1FC0000
-/* Lime Clock frequency is to set 133MHz */
+#define CFG_LIME_SDRAM_CLOCK 0xC1FC0038
+/* Lime Clock frequency is to set 100MHz */
+#define CFG_LIME_CLOCK_100MHZ 0x00000
+#if 0
+/* Lime Clock frequency for 133MHz */
#define CFG_LIME_CLOCK_133MHZ 0x10000
+#endif
/* SDRAM Parameter register */
#define CFG_LIME_MMR 0xC1FCFFFC
-/* SDRAM parameter value */
+/* SDRAM parameter value; was 0x414FB7F2, caused several vertical bars
+ and pixel flare on display when 133MHz was configured. According to
+ SDRAM chip datasheet CAS Latency is 3 for 133MHz and -75 Speed Grade */
+#ifdef CFG_LIME_CLOCK_133MHZ
+#define CFG_LIME_MMR_VALUE 0x414FB7F3
+#else
#define CFG_LIME_MMR_VALUE 0x414FB7F2
+#endif
/*-----------------------------------------------------------------------
* GPIO Setup