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author | Stefan Roese <sr@denx.de> | 2007-08-15 14:51:27 +0200 |
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committer | Stefan Roese <sr@denx.de> | 2007-08-15 14:51:27 +0200 |
commit | d61ea14885631e58a25feaa81ee82eb464c62d6a (patch) | |
tree | 27927975039d0a15e6c6d4dfe8f765a76a12820a /include/configs/luan.h | |
parent | 3ba4c2d68f6541db4677b4aea12071f56e6ff6e6 (diff) | |
parent | 594e79838ce5078a90d0c27abb2b2d61d5f8e8a7 (diff) | |
download | u-boot-imx-d61ea14885631e58a25feaa81ee82eb464c62d6a.zip u-boot-imx-d61ea14885631e58a25feaa81ee82eb464c62d6a.tar.gz u-boot-imx-d61ea14885631e58a25feaa81ee82eb464c62d6a.tar.bz2 |
Merge with git://www.denx.de/git/u-boot.git
Diffstat (limited to 'include/configs/luan.h')
-rw-r--r-- | include/configs/luan.h | 54 |
1 files changed, 30 insertions, 24 deletions
diff --git a/include/configs/luan.h b/include/configs/luan.h index cbb59c5..26dbec9 100644 --- a/include/configs/luan.h +++ b/include/configs/luan.h @@ -136,7 +136,6 @@ #define CONFIG_SPD_EEPROM 1 /* Use SPD EEPROM for setup */ #define SPD_EEPROM_ADDRESS {0x53, 0x52} /* SPD i2c spd addresses*/ #define CONFIG_DDR_ECC 1 /* with ECC support */ -#define CFG_44x_DDR2_CKTR_180 1 /* use 180 deg advance */ /*----------------------------------------------------------------------- * I2C @@ -213,31 +212,38 @@ #define CONFIG_HW_WATCHDOG /* watchdog */ #endif -#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \ - CFG_CMD_ASKENV | \ - CFG_CMD_DHCP | \ - CFG_CMD_ELF | \ - CFG_CMD_EEPROM | \ - CFG_CMD_I2C | \ - CFG_CMD_IRQ | \ - CFG_CMD_MII | \ - CFG_CMD_NET | \ - CFG_CMD_NFS | \ - CFG_CMD_PCI | \ - CFG_CMD_PING | \ - CFG_CMD_REGINFO | \ - CFG_CMD_SDRAM | \ - 0) - -/* this must be included AFTER the definition of CONFIG_COMMANDS */ -#include <cmd_confdefs.h> +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME + +/* + * Command line configuration. + */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_EEPROM +#define CONFIG_CMD_I2C +#define CONFIG_CMD_IRQ +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_CMD_NFS +#define CONFIG_CMD_PCI +#define CONFIG_CMD_PING +#define CONFIG_CMD_REGINFO +#define CONFIG_CMD_SDRAM /* * Miscellaneous configurable options */ #define CFG_LONGHELP /* undef to save memory */ #define CFG_PROMPT "=> " /* Monitor Command Prompt */ -#if (CONFIG_COMMANDS & CFG_CMD_KGDB) +#if defined(CONFIG_CMD_KGDB) #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ #else #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ @@ -265,7 +271,7 @@ * PCI stuff *----------------------------------------------------------------------- */ -#if (CONFIG_COMMANDS & CFG_CMD_PCI) +#if defined(CONFIG_CMD_PCI) /* General PCI */ #define CONFIG_PCI /* include pci support */ @@ -279,7 +285,7 @@ #define CFG_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */ #define CFG_PCI_SUBSYS_DEVICEID 0x4403 /* whatever */ -#endif /* CONFIG_COMMANDS & CFG_CMD_PCI */ +#endif /* * For booting Linux, the board info and command line data @@ -293,7 +299,7 @@ */ #define CFG_DCACHE_SIZE (32<<10) /* For AMCC 440 CPUs */ #define CFG_CACHELINE_SIZE 32 /* ... */ -#if (CONFIG_COMMANDS & CFG_CMD_KGDB) +#if defined(CONFIG_CMD_KGDB) #define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif @@ -305,7 +311,7 @@ #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ #define BOOTFLAG_WARM 0x02 /* Software reboot */ -#if (CONFIG_COMMANDS & CFG_CMD_KGDB) +#if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif |