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authorJoe Hershberger <joe.hershberger@ni.com>2011-10-11 23:57:30 -0500
committerKim Phillips <kim.phillips@freescale.com>2011-11-03 18:27:56 -0500
commit7d6a098219f8473ca4653cce5f7a49672b967f36 (patch)
tree82ad07513347a36c90f81ce50dbad8a5ca8c229e /include/configs/km
parent2fef402097866b4172d7a966a72397a5ccba5b10 (diff)
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mpc83xx: Cleanup usage of LBC constants
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'include/configs/km')
-rw-r--r--include/configs/km/km83xx-common.h14
1 files changed, 8 insertions, 6 deletions
diff --git a/include/configs/km/km83xx-common.h b/include/configs/km/km83xx-common.h
index 0d411c2..06ecb8a 100644
--- a/include/configs/km/km83xx-common.h
+++ b/include/configs/km/km83xx-common.h
@@ -103,16 +103,17 @@
#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
#define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE
-#define CONFIG_SYS_LBLAWAR0_PRELIM 0x8000001b /* 256MB window size */
+#define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_256MB)
#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | \
- (2 << BR_PS_SHIFT) | /* 16 bit port size */ \
+ BR_PS_16 | /* 16 bit port size */ \
+ BR_MS_GPCM | /* MSEL = GPCM */ \
BR_V)
#define CONFIG_SYS_OR0_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) | \
OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
OR_GPCM_SCY_5 | \
- OR_GPCM_TRLX | OR_GPCM_EAD)
+ OR_GPCM_TRLX_SET | OR_GPCM_EAD)
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks */
#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max num of sects on one chip */
@@ -123,15 +124,16 @@
*/
/* Window base at flash base */
#define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_KMBEC_FPGA_BASE
-#define CONFIG_SYS_LBLAWAR1_PRELIM 0x8000001A /* 128MB window size */
+#define CONFIG_SYS_LBLAWAR1_PRELIM (LBLAWAR_EN | LBLAWAR_128MB)
#define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_KMBEC_FPGA_BASE | \
- (1 << BR_PS_SHIFT) | /* 8 bit port size */ \
+ BR_PS_8 | /* 8 bit port size */ \
+ BR_MS_GPCM | /* MSEL = GPCM */ \
BR_V)
#define CONFIG_SYS_OR1_PRELIM (MEG_TO_AM(CONFIG_SYS_KMBEC_FPGA_SIZE) | \
OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
OR_GPCM_SCY_2 | \
- OR_GPCM_TRLX | OR_GPCM_EAD)
+ OR_GPCM_TRLX_SET | OR_GPCM_EAD)
/*
* Serial Port