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authorStefan Roese <sr@denx.de>2007-10-31 17:57:52 +0100
committerStefan Roese <sr@denx.de>2007-10-31 21:21:47 +0100
commitd25dfe08fbd1220cb994e7e6b105049aa9aa8e79 (patch)
treeb3fe3e942a36d0e6f668194e6cf911a4b436fca8 /include/configs/kilauea.h
parent9b94ac61d2176185c30adf0793e079ec30e68687 (diff)
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ppc4xx: Remove cache definition from 4xx board config files
All 4xx board config files don't need the cache definitions anymore. These are now defined in common headers. Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'include/configs/kilauea.h')
-rw-r--r--include/configs/kilauea.h9
1 files changed, 0 insertions, 9 deletions
diff --git a/include/configs/kilauea.h b/include/configs/kilauea.h
index 9a9f7ba..caf8b52 100644
--- a/include/configs/kilauea.h
+++ b/include/configs/kilauea.h
@@ -330,15 +330,6 @@
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
/*-----------------------------------------------------------------------
- * Cache Configuration
- *----------------------------------------------------------------------*/
-#define CFG_DCACHE_SIZE (16 << 10) /* For IBM 405EX */
-#define CFG_CACHELINE_SIZE 32
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
-#endif
-
-/*-----------------------------------------------------------------------
* External Bus Controller (EBC) Setup
*----------------------------------------------------------------------*/
#define CFG_NAND_CS 1 /* NAND chip connected to CSx */