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author | Wolfgang Denk <wd@denx.de> | 2011-10-12 22:45:30 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2011-10-12 22:45:30 +0200 |
commit | 0dd78fb9430e57ccc8e63369c6082b1c730f8aeb (patch) | |
tree | 4d6070550bd905c949a487bb7e0cca7783486227 /include/configs/intip.h | |
parent | f6d99aa9471bd5aa396d28bb3709162523cc4adb (diff) | |
parent | 15cc385e681c47851f32fc25c1cd95ab8efbd50c (diff) | |
download | u-boot-imx-0dd78fb9430e57ccc8e63369c6082b1c730f8aeb.zip u-boot-imx-0dd78fb9430e57ccc8e63369c6082b1c730f8aeb.tar.gz u-boot-imx-0dd78fb9430e57ccc8e63369c6082b1c730f8aeb.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx
* 'master' of git://git.denx.de/u-boot-ppc4xx:
ppc4xx: Change DDR2 CL from 4 to 5 for intip
ppc4xx: Improve lm63 pwm on dlvision-10g
ppc4xx: Do not stop booting on any keypress on intip
Diffstat (limited to 'include/configs/intip.h')
-rw-r--r-- | include/configs/intip.h | 16 |
1 files changed, 10 insertions, 6 deletions
diff --git a/include/configs/intip.h b/include/configs/intip.h index 3ff4a86..92b65af 100644 --- a/include/configs/intip.h +++ b/include/configs/intip.h @@ -37,10 +37,10 @@ #define CONFIG_460EX 1 /* Specific PPC460EX */ #ifdef CONFIG_DEVCONCENTER #define CONFIG_HOSTNAME devconcenter -#define CONFIG_IDENT_STRING " devconcenter 0.02" +#define CONFIG_IDENT_STRING " devconcenter 0.05" #else #define CONFIG_HOSTNAME intip -#define CONFIG_IDENT_STRING " intip 0.02" +#define CONFIG_IDENT_STRING " intip 0.05" #endif #define CONFIG_440 1 #define CONFIG_4xx 1 /* ... PPC4xx family */ @@ -63,6 +63,10 @@ #define CONFIG_FIT #define CFG_ALT_MEMTEST +#undef CONFIG_ZERO_BOOTDELAY_CHECK /* ignore keypress on bootdelay==0 */ +#define CONFIG_AUTOBOOT_KEYED /* use key strings to stop autoboot */ +#define CONFIG_AUTOBOOT_STOP_STR " " + /* * Base addresses -- Note these are effective addresses where the * actual resources get mapped (not physical addresses) @@ -196,13 +200,13 @@ #define CONFIG_SYS_SDRAM0_INITPLR2 0x81020000 #define CONFIG_SYS_SDRAM0_INITPLR3 0x81030000 #define CONFIG_SYS_SDRAM0_INITPLR4 0x81010002 -#define CONFIG_SYS_SDRAM0_INITPLR5 0xE4000542 +#define CONFIG_SYS_SDRAM0_INITPLR5 0xE4000552 #define CONFIG_SYS_SDRAM0_INITPLR6 0x81900400 #define CONFIG_SYS_SDRAM0_INITPLR7 0x8A880000 #define CONFIG_SYS_SDRAM0_INITPLR8 0x8A880000 #define CONFIG_SYS_SDRAM0_INITPLR9 0x8A880000 #define CONFIG_SYS_SDRAM0_INITPLR10 0x8A880000 -#define CONFIG_SYS_SDRAM0_INITPLR11 0x81000442 +#define CONFIG_SYS_SDRAM0_INITPLR11 0x81000452 #define CONFIG_SYS_SDRAM0_INITPLR12 0x81010382 #define CONFIG_SYS_SDRAM0_INITPLR13 0x81010002 #define CONFIG_SYS_SDRAM0_INITPLR14 0x00000000 @@ -212,11 +216,11 @@ #define CONFIG_SYS_SDRAM0_RDCC 0x40000000 #define CONFIG_SYS_SDRAM0_DLCR 0x00000000 #define CONFIG_SYS_SDRAM0_CLKTR 0x40000000 -#define CONFIG_SYS_SDRAM0_WRDTR 0x84000823 +#define CONFIG_SYS_SDRAM0_WRDTR 0x86000823 #define CONFIG_SYS_SDRAM0_SDTR1 0x80201000 #define CONFIG_SYS_SDRAM0_SDTR2 0x32204232 #define CONFIG_SYS_SDRAM0_SDTR3 0x090C0D15 -#define CONFIG_SYS_SDRAM0_MMODE 0x00000442 +#define CONFIG_SYS_SDRAM0_MMODE 0x00000452 #define CONFIG_SYS_SDRAM0_MEMODE 0x00000002 #define CONFIG_SYS_MBYTES_SDRAM 256 /* 256MB */ |