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authorwdenk <wdenk>2003-12-27 19:24:54 +0000
committerwdenk <wdenk>2003-12-27 19:24:54 +0000
commit7cb22f97ee41f344cf6542c077abf124c38ec5c6 (patch)
treef8370b91be3a7e71d304c05c64d6ec15a8867517 /include/configs/incaip.h
parentb2001f273fcb34d0f2ca43a9b01a24e5c50da6cd (diff)
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* Make CPU clock on ICA-IP board controllable by a "cpuclk"
environment variable which can set to "100", "133", or "150". The CPU clock will be configured accordingly upon next reboot. Other values are ignored. In case of an invalid or undefined "cpuclk" value, the compile-time default CPU clock speed will be used. * Enable Quad-UART on BMS2003 board (initialize the PCMCIA memory window that is used to access the UART registers by the Linux driver) * Patch by Reinhard Meyer, 20 Dec 2003: Fix clock calculation for the MPC5200 for higher clock frequencies (above 2**32 / 10 = 429.5 MHz).
Diffstat (limited to 'include/configs/incaip.h')
-rw-r--r--include/configs/incaip.h9
1 files changed, 2 insertions, 7 deletions
diff --git a/include/configs/incaip.h b/include/configs/incaip.h
index 15d5c2e..e6fa193 100644
--- a/include/configs/incaip.h
+++ b/include/configs/incaip.h
@@ -36,12 +36,7 @@
#define CPU_CLOCK_RATE 133000000 /* 133 MHz clock for the MIPS core */
#endif
-#if CPU_CLOCK_RATE == 100000000
-#define INFINEON_EBU_BOOTCFG 0x20C4 /* CMULT = 4 for 100 MHz */
-#else
-#define INFINEON_EBU_BOOTCFG 0x40C4 /* CMULT = 8 for 150 MHz */
-#endif
-
+#define INFINEON_EBU_BOOTCFG 0x40C4 /* CMULT = 8 */
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
@@ -106,7 +101,7 @@
#define CFG_BOOTPARAMS_LEN 128*1024
-#define CFG_HZ (CPU_CLOCK_RATE/2)
+#define CFG_HZ (incaip_get_cpuclk() / 2)
#define CFG_SDRAM_BASE 0x80000000