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authorWolfgang Denk <wd@denx.de>2008-10-18 21:59:44 +0200
committerWolfgang Denk <wd@denx.de>2008-10-18 21:59:44 +0200
commitf82642e33899766892499b163e60560fbbf87773 (patch)
treeab90f076f18e56b2b3e8c9375b95917daa78c1d9 /include/configs/idmr.h
parentb59b16ca24bc7e77ec113021a6d77b9b32fcf192 (diff)
parent360fe71e82b83e264c964c9447c537e9a1f643c8 (diff)
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Merge 'next' branch
Conflicts: board/freescale/mpc8536ds/mpc8536ds.c include/configs/mgcoge.h Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'include/configs/idmr.h')
-rw-r--r--include/configs/idmr.h96
1 files changed, 48 insertions, 48 deletions
diff --git a/include/configs/idmr.h b/include/configs/idmr.h
index a1f1517..1dd89f9 100644
--- a/include/configs/idmr.h
+++ b/include/configs/idmr.h
@@ -45,9 +45,9 @@
#define CONFIG_BOOTCOMMAND "run net_nfs"
#define CONFIG_BOOTDELAY 5
#define CONFIG_MCFUART
-#define CFG_UART_PORT (0)
+#define CONFIG_SYS_UART_PORT (0)
#define CONFIG_BAUDRATE 19200
-#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
+#define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
#define CONFIG_ETHADDR 00:06:3b:01:41:55
#define CONFIG_ETHPRIME
#define CONFIG_IPADDR 192.168.30.1
@@ -125,30 +125,30 @@
#define CONFIG_ENV_IS_IN_FLASH
#endif /* !CONFIG_MONITOR_IS_IN_RAM */
-#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */
+#define CONFIG_SYS_USE_PPCENV /* Environment embedded in sect .ppcenv */
-#define CFG_PROMPT "=> "
-#define CFG_LONGHELP /* undef to save memory */
+#define CONFIG_SYS_PROMPT "=> "
+#define CONFIG_SYS_LONGHELP /* undef to save memory */
#if defined(CONFIG_CMD_KGDB)
-#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
-#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#endif
-#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
-#define CFG_MAXARGS 16 /* max number of command args */
-#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
+#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-#define CFG_LOAD_ADDR 0x00100000
+#define CONFIG_SYS_LOAD_ADDR 0x00100000
-#define CFG_MEMTEST_START 0x400
-#define CFG_MEMTEST_END 0x380000
+#define CONFIG_SYS_MEMTEST_START 0x400
+#define CONFIG_SYS_MEMTEST_END 0x380000
-#define CFG_HZ (50000000 / 64)
-#define CFG_CLK 100000000
+#define CONFIG_SYS_HZ (50000000 / 64)
+#define CONFIG_SYS_CLK 100000000
-#define CFG_MBAR 0x40000000 /* Register Base Addrs */
+#define CONFIG_SYS_MBAR 0x40000000 /* Register Base Addrs */
/*
* Ethernet
@@ -158,74 +158,74 @@
# define CONFIG_NET_MULTI 1
# define CONFIG_MII 1
# define CONFIG_MII_INIT 1
-# define CFG_DISCOVER_PHY
-# define CFG_RX_ETH_BUFFER 8
-# define CFG_FAULT_ECHO_LINK_DOWN
+# define CONFIG_SYS_DISCOVER_PHY
+# define CONFIG_SYS_RX_ETH_BUFFER 8
+# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
-# define CFG_FEC0_PINMUX 0
-# define CFG_FEC0_MIIBASE CFG_FEC0_IOBASE
+# define CONFIG_SYS_FEC0_PINMUX 0
+# define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
# define MCFFEC_TOUT_LOOP 50000
-/* If CFG_DISCOVER_PHY is not defined - hardcoded */
-# ifndef CFG_DISCOVER_PHY
+/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
+# ifndef CONFIG_SYS_DISCOVER_PHY
# define FECDUPLEX FULL
# define FECSPEED _100BASET
# else
-# ifndef CFG_FAULT_ECHO_LINK_DOWN
-# define CFG_FAULT_ECHO_LINK_DOWN
+# ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
+# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
# endif
-# endif /* CFG_DISCOVER_PHY */
+# endif /* CONFIG_SYS_DISCOVER_PHY */
#endif
/*
* Definitions for initial stack pointer and data area (in DPRAM)
*/
-#define CFG_INIT_RAM_ADDR 0x20000000
-#define CFG_INIT_RAM_END 0x1000 /* End of used area in internal SRAM */
-#define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
-#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
-#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
+#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
+#define CONFIG_SYS_INIT_RAM_END 0x1000 /* End of used area in internal SRAM */
+#define CONFIG_SYS_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
+#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
/*
* Start addresses for the final memory configuration
* (Set up by the startup code)
- * Please note that CFG_SDRAM_BASE _must_ start at 0
+ * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
*/
-#define CFG_SDRAM_BASE 0x00000000
-#define CFG_SDRAM_SIZE 16 /* SDRAM size in MB */
-#define CFG_FLASH_BASE 0xff800000
+#define CONFIG_SYS_SDRAM_BASE 0x00000000
+#define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */
+#define CONFIG_SYS_FLASH_BASE 0xff800000
#ifdef CONFIG_MONITOR_IS_IN_RAM
-#define CFG_MONITOR_BASE 0x20000
+#define CONFIG_SYS_MONITOR_BASE 0x20000
#else /* !CONFIG_MONITOR_IS_IN_RAM */
-#define CFG_MONITOR_BASE (CFG_FLASH_BASE + 0x400)
+#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
#endif /* CONFIG_MONITOR_IS_IN_RAM */
-#define CFG_MONITOR_LEN 0x20000
-#define CFG_MALLOC_LEN (256 << 10)
-#define CFG_BOOTPARAMS_LEN (64*1024)
+#define CONFIG_SYS_MONITOR_LEN 0x20000
+#define CONFIG_SYS_MALLOC_LEN (256 << 10)
+#define CONFIG_SYS_BOOTPARAMS_LEN (64*1024)
/*
* For booting Linux, the board info and command line data
* have to be in the first 8 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization ??
*/
-#define CFG_BOOTMAPSZ (CFG_SDRAM_BASE + (CFG_SDRAM_SIZE << 20))
+#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
/* FLASH organization */
-#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
-#define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
-#define CFG_FLASH_ERASE_TOUT 1000
+#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
+#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
+#define CONFIG_SYS_FLASH_ERASE_TOUT 1000
-#define CFG_FLASH_SIZE 0x800000
+#define CONFIG_SYS_FLASH_SIZE 0x800000
/*
- * #define CFG_FLASH_USE_BUFFER_WRITE 1
+ * #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
*/
/* Cache Configuration */
-#define CFG_CACHELINE_SIZE 16
+#define CONFIG_SYS_CACHELINE_SIZE 16
/* Port configuration */
-#define CFG_FECI2C 0xF0
+#define CONFIG_SYS_FECI2C 0xF0
/* Dynamic MTD partition support */