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authorAkshay Saraswat <akshay.s@samsung.com>2014-06-18 17:53:58 +0530
committerMinkyu Kang <mk7.kang@samsung.com>2014-06-23 08:45:44 +0900
commit8e4ab1d58265884bbc9da6c6720d7a635f00fb2b (patch)
tree3b4dfc06fbedef9bce5115116ca2e09291ee1194 /include/configs/exynos5420.h
parenteacf46d340db182a4068772ec43e2586e9eaf80b (diff)
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Exynos5420: Introduce support for the Peach-Pit board
While the Exynos5420 chip is used in both Smdk5420 and in the Peach-Pit line of devices, there could be other boards using the same chip, so a common configuration file is being added (exynos5420.h) as well as two common device tree files (exynos54xx.dtsi & exynos5420.dtsi). The peach board as declared in boards.cfg is a copy of smdk5420 declaration. The configuration files are similar, but define different default device trees, console serial ports and prompts. The device tree files for smdk5420 and peach-pit inherit from the same common file. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'include/configs/exynos5420.h')
-rw-r--r--include/configs/exynos5420.h46
1 files changed, 46 insertions, 0 deletions
diff --git a/include/configs/exynos5420.h b/include/configs/exynos5420.h
new file mode 100644
index 0000000..3a28bbc
--- /dev/null
+++ b/include/configs/exynos5420.h
@@ -0,0 +1,46 @@
+/*
+ * Copyright (C) 2013 Samsung Electronics
+ *
+ * Configuration settings for the SAMSUNG EXYNOS5420 SoC
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CONFIG_EXYNOS5420_H
+#define __CONFIG_EXYNOS5420_H
+
+#define CONFIG_EXYNOS5420 /* which is in a Exynos5 Family */
+
+#define MACH_TYPE_SMDK5420 8002
+#define CONFIG_MACH_TYPE MACH_TYPE_SMDK5420
+
+#define CONFIG_VAR_SIZE_SPL
+
+#define CONFIG_SYS_SDRAM_BASE 0x20000000
+#define CONFIG_SYS_TEXT_BASE 0x23E00000
+#ifdef CONFIG_VAR_SIZE_SPL
+#define CONFIG_SPL_TEXT_BASE 0x02024410
+#else
+#define CONFIG_SPL_TEXT_BASE 0x02024400
+#endif
+#define CONFIG_IRAM_TOP 0x02074000
+
+#define CONFIG_DEVICE_TREE_LIST "exynos5420-peach-pit exynos5420-smdk5420"
+
+#define CONFIG_MAX_I2C_NUM 11
+
+/* Enable FIT support and comparison */
+#define CONFIG_FIT
+#define CONFIG_FIT_BEST_MATCH
+
+#define CONFIG_BOARD_REV_GPIO_COUNT 2
+
+#define CONFIG_BOOTCOMMAND "mmc read 20007000 451 2000; bootm 20007000"
+
+/*
+ * Put the initial stack pointer 1KB below this to allow room for the
+ * SPL marker. This value is arbitrary, but gd_t is placed starting here.
+ */
+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800)
+
+#endif /* __CONFIG_EXYNOS5420_H */