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author | Michal Simek <michal.simek@xilinx.com> | 2015-09-08 17:07:01 +0200 |
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committer | Michal Simek <michal.simek@xilinx.com> | 2015-11-19 14:03:05 +0100 |
commit | 6777f3863044bf58082a3fdd67a890f2b5080e14 (patch) | |
tree | 16507228d3b767be0d3ef7d02c0fcf9b1687dda8 /include/configs/exynos5-dt-common.h | |
parent | 2889659a5510558f55c50c51a29bd701792536fd (diff) | |
download | u-boot-imx-6777f3863044bf58082a3fdd67a890f2b5080e14.zip u-boot-imx-6777f3863044bf58082a3fdd67a890f2b5080e14.tar.gz u-boot-imx-6777f3863044bf58082a3fdd67a890f2b5080e14.tar.bz2 |
net: zynq: Fix MDC setting for zynq
Based on spec:
"MDC must not exceed 2.5 MHz (MDC is only active during MDIO read and
write operations)"
Zynq is running on 111MHz. Current setting is 32 which is 111/32=3.47
which is above of 2.5MHz.
Using 48 divider will give us correct setting according spec
(111/48=2.31).
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Diffstat (limited to 'include/configs/exynos5-dt-common.h')
0 files changed, 0 insertions, 0 deletions