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author | Markus Klotzbücher <Markus Klotzbümk@pollux.denx.de> | 2006-03-06 15:04:25 +0100 |
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committer | Markus Klotzbücher <mk@pollux.denx.de> | 2006-03-06 15:04:25 +0100 |
commit | 43638c674a1bc57eef41439e87c281269a08cb16 (patch) | |
tree | c42d1e3340add6c4b4099ea59b603ecffbe0430d /include/configs/delta.h | |
parent | f9e029184be5ef550d05262e0f150d31fb09d19b (diff) | |
download | u-boot-imx-43638c674a1bc57eef41439e87c281269a08cb16.zip u-boot-imx-43638c674a1bc57eef41439e87c281269a08cb16.tar.gz u-boot-imx-43638c674a1bc57eef41439e87c281269a08cb16.tar.bz2 |
Cleanup of NAND support of delta board using the Monahans Data Flash
Controller.
Diffstat (limited to 'include/configs/delta.h')
-rw-r--r-- | include/configs/delta.h | 22 |
1 files changed, 20 insertions, 2 deletions
diff --git a/include/configs/delta.h b/include/configs/delta.h index 3a94661..2a0a8fd 100644 --- a/include/configs/delta.h +++ b/include/configs/delta.h @@ -170,14 +170,32 @@ #define CFG_NAND_BASE_LIST { CFG_NAND0_BASE } #define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define SECTORSIZE 512 -/* #define NAND_NO_RB */ #define NAND_DELAY_US 25 /* mk@tbd: could be 0, I guess */ /* nand timeout values */ #define CFG_NAND_PROG_ERASE_TO 3000 #define CFG_NAND_OTHER_TO 100 #define CFG_NAND_SENDCMD_RETRY 3 -#define NAND_ALLOW_ERASE_ALL 1 +#undef NAND_ALLOW_ERASE_ALL /* Allow erasing bad blocks - don't use */ + +/* NAND Timing Parameters (in ns) */ +#define NAND_TIMING_tCH 10 +#define NAND_TIMING_tCS 0 +#define NAND_TIMING_tWH 20 +#define NAND_TIMING_tWP 40 + +#define NAND_TIMING_tRH 20 +#define NAND_TIMING_tRP 40 + +#define NAND_TIMING_tR 11123 +/* #define NAND_TIMING_tWHR 110 */ +#define NAND_TIMING_tWHR 100 +#define NAND_TIMING_tAR 10 + +/* NAND debugging */ +#define CFG_DFC_DEBUG1 /* usefull */ +#undef CFG_DFC_DEBUG2 /* noisy */ +#undef CFG_DFC_DEBUG3 /* extremly noisy */ #define CONFIG_MTD_DEBUG #define CONFIG_MTD_DEBUG_VERBOSE 1 |