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| author | Stefan Roese <sr@denx.de> | 2007-08-15 21:06:27 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2007-08-15 21:06:27 +0200 |
| commit | b706d63559aeec352bc72dd86d7d5423c15f6a60 (patch) | |
| tree | fdeda4d61970fef239d9d66ecd851fa46cfe5ec0 /include/configs/debris.h | |
| parent | c8603cfbd4573379a6076c9c208545ba2bbf019a (diff) | |
| parent | 594e79838ce5078a90d0c27abb2b2d61d5f8e8a7 (diff) | |
| download | u-boot-imx-b706d63559aeec352bc72dd86d7d5423c15f6a60.zip u-boot-imx-b706d63559aeec352bc72dd86d7d5423c15f6a60.tar.gz u-boot-imx-b706d63559aeec352bc72dd86d7d5423c15f6a60.tar.bz2 | |
Merge with git://www.denx.de/git/u-boot.git
Diffstat (limited to 'include/configs/debris.h')
| -rw-r--r-- | include/configs/debris.h | 48 |
1 files changed, 30 insertions, 18 deletions
diff --git a/include/configs/debris.h b/include/configs/debris.h index 8ff963f..7667e5e 100644 --- a/include/configs/debris.h +++ b/include/configs/debris.h @@ -122,23 +122,35 @@ #define CONFIG_BAUDRATE 9600 #define CONFIG_DRAM_SPEED 100 /* MHz */ -#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \ - CFG_CMD_ASKENV | \ - CFG_CMD_CACHE | \ - CFG_CMD_DATE | \ - CFG_CMD_DHCP | \ - CFG_CMD_DIAG | \ - CFG_CMD_EEPROM | \ - CFG_CMD_ELF | \ - CFG_CMD_I2C | \ - CFG_CMD_JFFS2 | \ - CFG_CMD_KGBD | \ - CFG_CMD_PCI | \ - CFG_CMD_PING | \ - CFG_CMD_SAVES | \ - CFG_CMD_SDRAM) -/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ -#include <cmd_confdefs.h> + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME + + +/* + * Command line configuration. + */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_DATE +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_EEPROM +#define CONFIG_CMD_ELF +#define CONFIG_CMD_I2C +#define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_KGBD +#define CONFIG_CMD_PCI +#define CONFIG_CMD_PING +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_SDRAM /* @@ -435,7 +447,7 @@ * Cache Configuration */ #define CFG_CACHELINE_SIZE 32 /* For MPC8240 CPU */ -#if (CONFIG_COMMANDS & CFG_CMD_KGDB) +#if defined(CONFIG_CMD_KGDB) # define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif |