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authorStefan Roese <sr@denx.de>2008-08-06 14:05:38 +0200
committerStefan Roese <sr@denx.de>2008-08-06 14:05:38 +0200
commitf2302d4430e7f3f48308d6a585320fe96af8afbd (patch)
treeeec529fa883a32b0bd44f65aa46a454dc5c69688 /include/configs/csb637.h
parent9246f5ecfd353ae297a02ffd5328402acf16c9dd (diff)
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Fix merge problems
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'include/configs/csb637.h')
-rw-r--r--include/configs/csb637.h13
1 files changed, 5 insertions, 8 deletions
diff --git a/include/configs/csb637.h b/include/configs/csb637.h
index e9c6d8e..735a211 100644
--- a/include/configs/csb637.h
+++ b/include/configs/csb637.h
@@ -114,17 +114,11 @@
*/
#include <config_cmd_default.h>
-#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_PING
-#undef CONFIG_CMD_BDI
-#undef CONFIG_CMD_IMI
-#undef CONFIG_CMD_AUTOSCRIPT
-#undef CONFIG_CMD_FPGA
-#undef CONFIG_CMD_MISC
-#undef CONFIG_CMD_LOADS
-
+#ifdef NAND_SUPPORT_HAS_BEEN_FIXED /* NAND support is broken / unimplemented */
#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
#define SECTORSIZE 512
@@ -140,6 +134,7 @@
#define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */
#define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */
+#include <asm/arch/AT91RM9200.h> /* needed for port definitions */
#define NAND_DISABLE_CE(nand) do { *AT91C_PIOC_SODR = AT91C_PIO_PC0;} while(0)
#define NAND_ENABLE_CE(nand) do { *AT91C_PIOC_CODR = AT91C_PIO_PC0;} while(0)
@@ -155,6 +150,8 @@
#define NAND_CTL_CLRCLE(nandptr)
#define NAND_CTL_SETCLE(nandptr)
+#endif /* NAND_SUPPORT_HAS_BEEN_FIXED */
+
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM 0x20000000
#define PHYS_SDRAM_SIZE 0x4000000 /* 64 megs */