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author | Tom Rini <trini@ti.com> | 2014-11-24 12:00:00 -0500 |
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committer | Tom Rini <trini@ti.com> | 2014-11-24 12:00:00 -0500 |
commit | 746667f1e56bf08d03e66a178df3c4f4f6c806e1 (patch) | |
tree | e42c7fd72cb1ef97a5a05a73b06b3cd2fc118147 /include/configs/chromebook_link.h | |
parent | 6c016485a685b5cdac28edb25147311a3e88d51f (diff) | |
parent | fe5b9b447c6eea3873833b1f3ba15c9854aa2ef8 (diff) | |
download | u-boot-imx-746667f1e56bf08d03e66a178df3c4f4f6c806e1.zip u-boot-imx-746667f1e56bf08d03e66a178df3c4f4f6c806e1.tar.gz u-boot-imx-746667f1e56bf08d03e66a178df3c4f4f6c806e1.tar.bz2 |
Merge git://git.denx.de/u-boot-x86
Conflicts:
arch/x86/cpu/Makefile
Signed-off-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'include/configs/chromebook_link.h')
-rw-r--r-- | include/configs/chromebook_link.h | 74 |
1 files changed, 74 insertions, 0 deletions
diff --git a/include/configs/chromebook_link.h b/include/configs/chromebook_link.h new file mode 100644 index 0000000..8caeca6 --- /dev/null +++ b/include/configs/chromebook_link.h @@ -0,0 +1,74 @@ +/* + * Copyright (c) 2011 The Chromium OS Authors. + * (C) Copyright 2008 + * Graeme Russ, graeme.russ@gmail.com. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/* + * board/config.h - configuration options, board specific + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <configs/x86-common.h> + +#define CONFIG_SYS_CAR_ADDR 0xff7e0000 +#define CONFIG_SYS_CAR_SIZE (128 * 1024) +#define CONFIG_SYS_MONITOR_LEN (1 << 20) +#define CONFIG_DCACHE_RAM_MRC_VAR_SIZE 0x4000 +#define CONFIG_SYS_X86_START16 0xfffff800 +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_EARLY_INIT_R +#define CONFIG_DISPLAY_CPUINFO + +#define CONFIG_X86_RESET_VECTOR +#define CONFIG_NR_DRAM_BANKS 8 +#define CONFIG_X86_MRC_START 0xfffa0000 +#define CONFIG_CACHE_MRC_SIZE_KB 512 + +#define CONFIG_COREBOOT_SERIAL + +#define CONFIG_SCSI_DEV_LIST {PCI_VENDOR_ID_INTEL, \ + PCI_DEVICE_ID_INTEL_NM10_AHCI}, \ + {PCI_VENDOR_ID_INTEL, \ + PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_MOBILE}, \ + {PCI_VENDOR_ID_INTEL, \ + PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_SERIES6}, \ + {PCI_VENDOR_ID_INTEL, \ + PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE} + +/* + * These common x86 features are not yet supported, but are added in + * follow-on patches in this series. Add undefs here to avoid every patch + * having to put things back into x86-common.h + */ +#undef CONFIG_VIDEO +#undef CONFIG_CFB_CONSOLE +#undef CONFIG_ICH_SPI +#undef CONFIG_SPI +#undef CONFIG_CMD_SPI +#undef CONFIG_CMD_SF +#undef CONFIG_USB_EHCI +#undef CONFIG_CMD_USB +#undef CONFIG_CMD_SCSI + +#define CONFIG_PCI_MEM_BUS 0xe0000000 +#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS +#define CONFIG_PCI_MEM_SIZE 0x10000000 + +#define CONFIG_PCI_PREF_BUS 0xd0000000 +#define CONFIG_PCI_PREF_PHYS CONFIG_PCI_PREF_BUS +#define CONFIG_PCI_PREF_SIZE 0x10000000 + +#define CONFIG_PCI_IO_BUS 0x1000 +#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS +#define CONFIG_PCI_IO_SIZE 0xefff + +#define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,vga,serial\0" \ + "stdout=vga,serial\0" \ + "stderr=vga,serial\0" + +#endif /* __CONFIG_H */ |