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| author | Jon Loeliger <jdl@freescale.com> | 2008-06-06 10:48:31 -0500 |
|---|---|---|
| committer | Jon Loeliger <jdl@freescale.com> | 2008-06-06 10:48:31 -0500 |
| commit | 1a247ba7fa5fb09f56892a09a990f03ce564b3e2 (patch) | |
| tree | 9dab0ef013cc6dc7883454808ecf6ba4d7a7a94e /include/configs/cerf250.h | |
| parent | 2c289e320dcfb3760e99cf1d765cb067194a1202 (diff) | |
| parent | 8155efbd7ae9c65564ca98affe94631d612ae088 (diff) | |
| download | u-boot-imx-1a247ba7fa5fb09f56892a09a990f03ce564b3e2.zip u-boot-imx-1a247ba7fa5fb09f56892a09a990f03ce564b3e2.tar.gz u-boot-imx-1a247ba7fa5fb09f56892a09a990f03ce564b3e2.tar.bz2 | |
Merge commit 'wd/master'
Diffstat (limited to 'include/configs/cerf250.h')
| -rw-r--r-- | include/configs/cerf250.h | 36 |
1 files changed, 18 insertions, 18 deletions
diff --git a/include/configs/cerf250.h b/include/configs/cerf250.h index e06735d..c801f03 100644 --- a/include/configs/cerf250.h +++ b/include/configs/cerf250.h @@ -39,7 +39,7 @@ #define BOARD_LATE_INIT 1 #define CONFIG_BAUDRATE 38400 -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ +#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ /* * Size of malloc() pool @@ -104,7 +104,7 @@ #define CFG_PROMPT "=> " /* Monitor Command Prompt */ #endif #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ -#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) +#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ #define CFG_MAXARGS 16 /* max number of command args */ #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ @@ -137,21 +137,21 @@ /* * Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 4 /* we have 2 banks of DRAM */ -#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */ -#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ -#define PHYS_SDRAM_2 0xa4000000 /* SDRAM Bank #2 */ -#define PHYS_SDRAM_2_SIZE 0x00000000 /* 0 MB */ -#define PHYS_SDRAM_3 0xa8000000 /* SDRAM Bank #3 */ -#define PHYS_SDRAM_3_SIZE 0x00000000 /* 0 MB */ -#define PHYS_SDRAM_4 0xac000000 /* SDRAM Bank #4 */ -#define PHYS_SDRAM_4_SIZE 0x00000000 /* 0 MB */ - -#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ -#define PHYS_FLASH_2 0x04000000 /* Flash Bank #2 */ -#define PHYS_FLASH_SIZE 0x02000000 /* 32 MB */ -#define PHYS_FLASH_BANK_SIZE 0x02000000 /* 32 MB Banks */ -#define PHYS_FLASH_SECT_SIZE 0x00040000 /* 256 KB sectors (x2) */ +#define CONFIG_NR_DRAM_BANKS 4 /* we have 2 banks of DRAM */ +#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */ +#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ +#define PHYS_SDRAM_2 0xa4000000 /* SDRAM Bank #2 */ +#define PHYS_SDRAM_2_SIZE 0x00000000 /* 0 MB */ +#define PHYS_SDRAM_3 0xa8000000 /* SDRAM Bank #3 */ +#define PHYS_SDRAM_3_SIZE 0x00000000 /* 0 MB */ +#define PHYS_SDRAM_4 0xac000000 /* SDRAM Bank #4 */ +#define PHYS_SDRAM_4_SIZE 0x00000000 /* 0 MB */ + +#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ +#define PHYS_FLASH_2 0x04000000 /* Flash Bank #2 */ +#define PHYS_FLASH_SIZE 0x02000000 /* 32 MB */ +#define PHYS_FLASH_BANK_SIZE 0x02000000 /* 32 MB Banks */ +#define PHYS_FLASH_SECT_SIZE 0x00040000 /* 256 KB sectors (x2) */ #define CFG_DRAM_BASE 0xa0000000 #define CFG_DRAM_SIZE 0x04000000 @@ -210,7 +210,7 @@ * FLASH and environment organization */ #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ -#define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */ +#define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */ /* timeout values are in ticks */ #define CFG_FLASH_ERASE_TOUT (25*CFG_HZ) /* Timeout for Flash Erase */ |