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authorRupjyoti Sarmah <rsarmah@amcc.com>2010-07-07 18:14:48 +0530
committerStefan Roese <sr@denx.de>2010-07-23 09:53:20 +0200
commit17a684449728ce4c9ce79fa9e7e75b86a5f9b41d (patch)
tree598a21c158a6515e7b2a74ed8a485e1d5d8246dc /include/configs/canyonlands.h
parent1f82ff4777f360e92aa37bbbed647f7b9d9d2044 (diff)
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ppc4xx/Canyonlands added USB board callbacks
Functions added to support board callbacks for USB init. This isolates USB manipulations such that it is only touched if USB is used by U-Boot. Signed-off-by: Dave Mitchell <dmitchell@appliedmicro.com> Signed-off-by: Rupjyoti Sarmah <rsarmah@appliedmicro.com> Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'include/configs/canyonlands.h')
-rw-r--r--include/configs/canyonlands.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/include/configs/canyonlands.h b/include/configs/canyonlands.h
index ac9b3c5..6fe7639 100644
--- a/include/configs/canyonlands.h
+++ b/include/configs/canyonlands.h
@@ -77,6 +77,13 @@
#define CONFIG_SYS_PCIE0_XCFGBASE 0xc3000000
#define CONFIG_SYS_PCIE1_XCFGBASE 0xc3001000
+/*
+ * BCSR bits as defined in the Canyonlands board user manual.
+ */
+#define BCSR_USBCTRL_OTG_RST 0x32
+#define BCSR_USBCTRL_HOST_RST 0x01
+#define BCSR_SELECT_PCIE 0x10
+
#define CONFIG_SYS_PCIE0_UTLBASE 0xc08010000ULL /* 36bit physical addr */
/* base address of inbound PCIe window */
@@ -417,6 +424,7 @@
#define CONFIG_SYS_USB_OHCI_REGS_BASE (CONFIG_SYS_AHB_BASE | 0xd0000)
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "ppc440"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
+#define CONFIG_SYS_USB_OHCI_BOARD_INIT
#endif
/*