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| author | Stefan Roese <sr@denx.de> | 2008-10-25 06:45:31 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2008-10-31 10:30:28 +0100 |
| commit | 3befd85633d33c4dcca1f359c3f4848c5ab8e4d2 (patch) | |
| tree | 33341352e381764354c78540f048caf5f522480d /include/configs/canyonlands.h | |
| parent | d685b74c64a38849f1a129b3ab846fbf67dd937e (diff) | |
| download | u-boot-imx-3befd85633d33c4dcca1f359c3f4848c5ab8e4d2.zip u-boot-imx-3befd85633d33c4dcca1f359c3f4848c5ab8e4d2.tar.gz u-boot-imx-3befd85633d33c4dcca1f359c3f4848c5ab8e4d2.tar.bz2 | |
ppc4xx: Correctly configure the GPIO pin muxing on Arches
Arches doesn't use PerCS3 but GPIO43, so let's configure the GPIO
pin multiplexing correctly
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'include/configs/canyonlands.h')
| -rw-r--r-- | include/configs/canyonlands.h | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/include/configs/canyonlands.h b/include/configs/canyonlands.h index ec08ba7..f8e8801 100644 --- a/include/configs/canyonlands.h +++ b/include/configs/canyonlands.h @@ -571,6 +571,16 @@ #define CONFIG_SYS_EBC_CFG 0xB8400000 /* EBC0_CFG */ /* + * Arches doesn't use PerCS3 but GPIO43, so let's configure the GPIO + * pin multiplexing correctly + */ +#if defined(CONFIG_ARCHES) +#define GPIO43_USE GPIO_SEL /* On Arches this pin is used as GPIO */ +#else +#define GPIO43_USE GPIO_ALT1 /* On Glacier this pin is used as ALT1 -> PerCS3 */ +#endif + +/* * PPC4xx GPIO Configuration */ #ifdef CONFIG_460EX @@ -698,7 +708,7 @@ {GPIO1_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO40 IRQ(3) */ \ {GPIO1_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO41 CS(1) */ \ {GPIO1_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO42 CS(2) */ \ -{GPIO1_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO43 CS(3) DMAReq1 IRQ(10)*/ \ +{GPIO1_BASE, GPIO_OUT, GPIO43_USE, GPIO_OUT_0},/* GPIO43 CS(3) DMAReq1 IRQ(10)*/ \ {GPIO1_BASE, GPIO_IN , GPIO_ALT3, GPIO_OUT_0}, /* GPIO44 CS(4) DMAAck1 IRQ(11)*/ \ {GPIO1_BASE, GPIO_IN , GPIO_ALT3, GPIO_OUT_0}, /* GPIO45 CS(5) EOT/TC1 IRQ(12)*/ \ {GPIO1_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO46 PerAddr(5) DMAReq0 IRQ(13)*/ \ |