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author | Lokesh Vutla <lokeshvutla@ti.com> | 2014-08-04 19:42:24 +0530 |
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committer | Tom Rini <trini@ti.com> | 2014-08-25 10:48:13 -0400 |
commit | 7b9225237049181524be5a8801dde6a6716e1357 (patch) | |
tree | 1f1ddac01b283723bf1785a77c0fd4e072338ba1 /include/configs/bf525-ucr2.h | |
parent | 1286b7f6ca5fc3d42927cbe2f50b51a4870021dd (diff) | |
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ARM: DRA: Enable VTT regulator
DRA7 evm REV G and later boards uses a vtt regulator for DDR3 termination
and this is controlled by gpio7_11. Configuring gpio7_11.
The pad A22(offset 0x3b4) is used by gpio7_11 on REV G and later boards,
and left unused on previous boards, so it is safe enough to enable gpio
on all DRA7 boards.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Diffstat (limited to 'include/configs/bf525-ucr2.h')
0 files changed, 0 insertions, 0 deletions