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author | Wolfgang Denk <wd@denx.de> | 2011-05-18 14:31:56 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2011-05-18 14:31:56 +0200 |
commit | 0ea91423f47461bf7eaed2d4aff198076dd07fd5 (patch) | |
tree | b5201f976fe3f7f5ed6f485f7ef81d8d8c9ec033 /include/configs/atstk1002.h | |
parent | ce6400a0f88f9648d6def519244ea8c33c7612b2 (diff) | |
parent | 24890f11980eb70d835ca7e0b00d32284d8f546c (diff) | |
download | u-boot-imx-0ea91423f47461bf7eaed2d4aff198076dd07fd5.zip u-boot-imx-0ea91423f47461bf7eaed2d4aff198076dd07fd5.tar.gz u-boot-imx-0ea91423f47461bf7eaed2d4aff198076dd07fd5.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm: (40 commits)
avr32: add ATAG_BOARDINFO
at91: reworked support for otc570 board
at91: reworked support for meesc board
hammerhead: move CONFIG_SYS_TEXT_BASE to header
mimc200: move CONFIG_SYS_TEXT_BASE to header
favr-32-ezkit: move CONFIG_SYS_TEXT_BASE to header
atstk100x: move CONFIG_SYS_TEXT_BASE to header
atngw100: move CONFIG_SYS_TEXT_BASE to header
mimc200: fix "#define XXXX 1"
hammerhead: fix "#define XXXX 1"
favr-32-ezkit: fix "#define XXXX 1"
atstk1006: fix "#define XXXX 1"
atstk1004: fix "#define XXXX 1"
atstk1003: fix "#define XXXX 1"
atstk1002: fix "#define XXXX 1"
atngw100: fix "#define XXXX 1"
avr32: use single linker script
avr32/config.mk: simplify PLATFORM_RELFLAGS
avr32: fix linking
Add support for Bluewater Systems Snapper 9260 and 9G20 modules
...
Diffstat (limited to 'include/configs/atstk1002.h')
-rw-r--r-- | include/configs/atstk1002.h | 57 |
1 files changed, 28 insertions, 29 deletions
diff --git a/include/configs/atstk1002.h b/include/configs/atstk1002.h index 6416d17..c17d107 100644 --- a/include/configs/atstk1002.h +++ b/include/configs/atstk1002.h @@ -24,15 +24,15 @@ #ifndef __CONFIG_H #define __CONFIG_H -#include <asm/arch/memory-map.h> +#include <asm/arch/hardware.h> -#define CONFIG_AVR32 1 -#define CONFIG_AT32AP 1 -#define CONFIG_AT32AP7000 1 -#define CONFIG_ATSTK1002 1 -#define CONFIG_ATSTK1000 1 +#define CONFIG_AVR32 +#define CONFIG_AT32AP +#define CONFIG_AT32AP7000 +#define CONFIG_ATSTK1002 +#define CONFIG_ATSTK1000 -#define CONFIG_ATSTK1000_EXT_FLASH 1 +#define CONFIG_ATSTK1000_EXT_FLASH /* * Timer clock frequency. We're using the CPU-internal COUNT register @@ -46,8 +46,8 @@ * PLL frequency. * (CONFIG_SYS_OSC0_HZ * CONFIG_SYS_PLL0_MUL) / CONFIG_SYS_PLL0_DIV = PLL MHz */ -#define CONFIG_PLL 1 -#define CONFIG_SYS_POWER_MANAGER 1 +#define CONFIG_PLL +#define CONFIG_SYS_POWER_MANAGER #define CONFIG_SYS_OSC0_HZ 20000000 #define CONFIG_SYS_PLL0_DIV 1 #define CONFIG_SYS_PLL0_MUL 7 @@ -85,17 +85,15 @@ */ #define CONFIG_SYS_PLL0_OPT 0x04 -#undef CONFIG_USART0 -#define CONFIG_USART1 1 -#undef CONFIG_USART2 -#undef CONFIG_USART3 +#define CONFIG_USART_BASE ATMEL_BASE_USART1 +#define CONFIG_USART_ID 1 /* User serviceable stuff */ -#define CONFIG_DOS_PARTITION 1 +#define CONFIG_DOS_PARTITION -#define CONFIG_CMDLINE_TAG 1 -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_INITRD_TAG 1 +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG #define CONFIG_STACKSIZE (2048) @@ -111,8 +109,8 @@ * data on the serial line may interrupt the boot sequence. */ #define CONFIG_BOOTDELAY 1 -#define CONFIG_AUTOBOOT 1 -#define CONFIG_AUTOBOOT_KEYED 1 +#define CONFIG_AUTOBOOT +#define CONFIG_AUTOBOOT_KEYED #define CONFIG_AUTOBOOT_PROMPT \ "Press SPACE to abort autoboot in %d seconds\n", bootdelay #define CONFIG_AUTOBOOT_DELAY_STR "d" @@ -123,8 +121,8 @@ * should be generated and assigned to the environment variables * "ethaddr" and "eth1addr". This is normally done during production. */ -#define CONFIG_OVERWRITE_ETHADDR_ONCE 1 -#define CONFIG_NET_MULTI 1 +#define CONFIG_OVERWRITE_ETHADDR_ONCE +#define CONFIG_NET_MULTI /* * BOOTP options @@ -150,13 +148,13 @@ #undef CONFIG_CMD_SOURCE #undef CONFIG_CMD_XIMG -#define CONFIG_ATMEL_USART 1 -#define CONFIG_MACB 1 -#define CONFIG_PORTMUX_PIO 1 +#define CONFIG_ATMEL_USART +#define CONFIG_MACB +#define CONFIG_PORTMUX_PIO #define CONFIG_SYS_NR_PIOS 5 -#define CONFIG_SYS_HSDRAMC 1 -#define CONFIG_MMC 1 -#define CONFIG_ATMEL_MCI 1 +#define CONFIG_SYS_HSDRAMC +#define CONFIG_MMC +#define CONFIG_ATMEL_MCI #define CONFIG_SYS_DCACHE_LINESZ 32 #define CONFIG_SYS_ICACHE_LINESZ 32 @@ -175,12 +173,13 @@ #define CONFIG_SYS_MAX_FLASH_SECT 135 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE +#define CONFIG_SYS_TEXT_BASE 0x00000000 #define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE #define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE #define CONFIG_SYS_SDRAM_BASE EBI_SDRAM_BASE -#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_IS_IN_FLASH #define CONFIG_ENV_SIZE 65536 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE) @@ -198,7 +197,7 @@ #define CONFIG_SYS_CBSIZE 256 #define CONFIG_SYS_MAXARGS 16 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_LONGHELP 1 +#define CONFIG_SYS_LONGHELP #define CONFIG_SYS_MEMTEST_START EBI_SDRAM_BASE #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x700000) |