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authorBo Shen <voice.shen@atmel.com>2012-06-27 21:24:10 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-07-07 14:07:29 +0200
commite1edd06594f41a53cbc3344db78b3093ccb84bf3 (patch)
tree5039ca3c9b5b7f95c654962b8450c695d11599fd /include/configs/at91sam9m10g45ek.h
parentcc30b7803d3a3237fbcef860b9320e9b4bfbffaf (diff)
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AT91: at91sam9m10g45ek : Enable EHCI instead OHCI
Enable EHCI support instead OHCI Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Diffstat (limited to 'include/configs/at91sam9m10g45ek.h')
-rw-r--r--include/configs/at91sam9m10g45ek.h20
1 files changed, 3 insertions, 17 deletions
diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h
index f8b3095..1d5fc8f 100644
--- a/include/configs/at91sam9m10g45ek.h
+++ b/include/configs/at91sam9m10g45ek.h
@@ -59,17 +59,6 @@
#define CONFIG_USART_BASE ATMEL_BASE_DBGU
#define CONFIG_USART_ID ATMEL_ID_SYS
-/*
- * This needs to be defined for the OHCI code to work but it is defined as
- * ATMEL_ID_UHPHS in the CPU specific header files.
- */
-#define ATMEL_ID_UHP ATMEL_ID_UHPHS
-
-/*
- * Specify the clock enable bit in the PMC_SCER register.
- */
-#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
-
/* LCD */
#define CONFIG_LCD
#define LCD_BPP LCD_COLOR8
@@ -147,13 +136,10 @@
#define CONFIG_RESET_PHY_R
/* USB */
-#define CONFIG_USB_ATMEL
-#define CONFIG_USB_OHCI_NEW
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_ATMEL
+#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
#define CONFIG_DOS_PARTITION
-#define CONFIG_SYS_USB_OHCI_CPU_INIT
-#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_HCI
-#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9g45"
-#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
#define CONFIG_USB_STORAGE
#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */