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authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2009-04-16 21:30:44 +0200
committerJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2009-04-16 21:30:44 +0200
commitdc39ae9513c32dfeb9e018dc0d22c6484514fefb (patch)
tree136c61b2c9731ddf51ef3e222bbf1e44781c5175 /include/configs/at91sam9263ek.h
parentf75a729b5c1434d5a5bbf453b1b699bf1c3ffbce (diff)
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at91sam9/at91cap: improve clock framework
calculate dynamically the clock rate and pllb setting for usb Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'include/configs/at91sam9263ek.h')
-rw-r--r--include/configs/at91sam9263ek.h6
1 files changed, 1 insertions, 5 deletions
diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h
index ee1531f..34c7521 100644
--- a/include/configs/at91sam9263ek.h
+++ b/include/configs/at91sam9263ek.h
@@ -30,16 +30,12 @@
/* ARM asynchronous clock */
#define AT91_CPU_NAME "AT91SAM9263"
#define AT91_MAIN_CLOCK 16367660 /* 16.367 MHz crystal */
-#define AT91_MASTER_CLOCK 100000000 /* peripheral */
-#define AT91_CPU_CLOCK 200000000 /* cpu */
-#define CONFIG_SYS_AT91_PLLB 0x133a3e8d /* PLLB settings for USB */
#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
-#define AT91_SLOW_CLOCK 32768 /* slow clock */
-
#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
#define CONFIG_AT91SAM9263 1 /* It's an Atmel AT91SAM9263 SoC*/
#define CONFIG_AT91SAM9263EK 1 /* on an AT91SAM9263EK Board */
+#define CONFIG_ARCH_CPU_INIT
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */