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authorStelian Pop <stelian@popies.net>2008-11-09 00:14:46 +0100
committerJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2008-11-21 01:41:14 +0100
commit3e0cda071a67cb5709e3fa4faf6b31a731859acc (patch)
treef41e0b3d1f5c09900d841c7737741698a91c79e3 /include/configs/at91cap9adk.h
parentad229a44e162af0f65e57e4e3dc133d5f0364ecb (diff)
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AT91: Enable PLLB for USB
At least some (old ?) versions of the AT91Bootstrap do not set up the PLLB correctly to 48 MHz in order to make USB host function correctly. This patch sets up the PLLB to the same values Linux uses, and makes USB work ok on the following CPUs: - AT91CAP9 - AT91SAM9260 - AT91SAM9263 This patch also defines CONFIG_USB_STORAGE and CONFIG_CMD_FAT for all the relevant AT91CAP9/AT91SAM9 atmel boards. Signed-off-by: Stelian Pop <stelian@popies.net> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'include/configs/at91cap9adk.h')
-rw-r--r--include/configs/at91cap9adk.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/configs/at91cap9adk.h b/include/configs/at91cap9adk.h
index 667e049..aeb06ac 100644
--- a/include/configs/at91cap9adk.h
+++ b/include/configs/at91cap9adk.h
@@ -32,6 +32,7 @@
#define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
#define AT91_MASTER_CLOCK 100000000 /* peripheral */
#define AT91_CPU_CLOCK 200000000 /* cpu */
+#define CFG_AT91_PLLB 0x10073e01 /* PLLB settings for USB */
#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
#define AT91_SLOW_CLOCK 32768 /* slow clock */
@@ -137,6 +138,8 @@
#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00700000 /* AT91_BASE_UHP */
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91cap9"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
+#define CONFIG_USB_STORAGE 1
+#define CONFIG_CMD_FAT 1
#define CONFIG_SYS_LOAD_ADDR 0x72000000 /* load address */