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| author | Haavard Skinnemoen <hskinnemoen@atmel.com> | 2007-06-19 15:40:01 +0200 |
|---|---|---|
| committer | Haavard Skinnemoen <hskinnemoen@atmel.com> | 2007-06-19 15:40:01 +0200 |
| commit | 448f5fea4c7dd531b69e4e60eed2a72b89b4ed6d (patch) | |
| tree | 022599b68a0e72f34f3f152f4a0056b557a06a44 /include/configs/aev.h | |
| parent | f2134f8e9eb006bdcd729e89f309c07b2fa45180 (diff) | |
| parent | 5ffa76a032279bc6d3230b703eda32d13305ba13 (diff) | |
| download | u-boot-imx-448f5fea4c7dd531b69e4e60eed2a72b89b4ed6d.zip u-boot-imx-448f5fea4c7dd531b69e4e60eed2a72b89b4ed6d.tar.gz u-boot-imx-448f5fea4c7dd531b69e4e60eed2a72b89b4ed6d.tar.bz2 | |
Merge branch 'upstream'
Diffstat (limited to 'include/configs/aev.h')
| -rw-r--r-- | include/configs/aev.h | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/include/configs/aev.h b/include/configs/aev.h index 8d9f0a1..f6f530c 100644 --- a/include/configs/aev.h +++ b/include/configs/aev.h @@ -166,17 +166,17 @@ /* * IPB Bus clocking configuration. */ -#define CFG_IPBSPEED_133 /* define for 133MHz speed */ +#define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */ -#if defined(CFG_IPBSPEED_133) +#if defined(CFG_IPBCLK_EQUALS_XLBCLK) /* * PCI Bus clocking configuration * * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if - * CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet hasn't - * been tested with a IPB Bus Clock of 66 MHz. + * CFG_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock + * of 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz. */ -#define CFG_PCISPEED_66 /* define for 66MHz speed */ +#define CFG_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */ #endif /* @@ -362,7 +362,7 @@ #define CFG_BOOTCS_START CFG_FLASH_BASE #define CFG_BOOTCS_SIZE CFG_FLASH_SIZE -#ifdef CFG_PCISPEED_66 +#ifdef CFG_PCICLK_EQUALS_IPBCLK_DIV2 #define CFG_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */ #else #define CFG_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */ |